Author Topic: Reducing voltage spike on transition  (Read 3087 times)

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Offline awefTopic starter

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Reducing voltage spike on transition
« on: May 23, 2017, 04:03:05 pm »
Is there a common way to reduce voltage spikes on digital signals during switching?  I'm guessing a capacitor or RC circuit would do it.

The image attached shows the output of a signal using a logic level converter from 3.3v to 5.0v.  But you can see the "raw" pin output overshoots 5v to 7.65v, and undershoots 0v to -1.x or -2.x volts.

Nothing smoking yet, but in any case the 7.65v seems a bit excessive.
« Last Edit: May 23, 2017, 04:05:09 pm by awef »
 

Offline ThomasDK

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Re: Reducing voltage spike on transition
« Reply #1 on: May 23, 2017, 04:13:45 pm »
How and where are you probing?

Are you using a ground spring on the probe?
 
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Offline awefTopic starter

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Re: Reducing voltage spike on transition
« Reply #2 on: May 23, 2017, 05:09:14 pm »
So I do have a ground pin, so I hooked up my probe to both GND and the signal pin. 

So for example OSC probe A - GND & 5v Signal Pin; OSC probe B - Admittedly no GND (I "believe" my Oscilloscope uses ground from probe A :o) and another 5v Signal pin.

I did probe the 3v3 pins and coming directly from the MCU there is "much less" of a spike.  So my guess is the probe is not "inherently" giving spikes.

But thanks for the note, if I notice spikes in the future I'll at the very least check to make sure my ground is connected (like it is now)
 

Offline Siwastaja

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Re: Reducing voltage spike on transition
« Reply #3 on: May 23, 2017, 05:14:37 pm »
Look for termination of digital signals with extremely fast edge rates.

Unless the driving IC provides integrated active slew-rate control, simple series resistor of about 50-100 ohms (even 22ohms often does wonders) is usually what is needed, to dampen the parasitic LC network, and utilize the parasitic C as RC filter.

Of course, increasing both R and C will filter more, but it will quickly slow down the signal. But if you don't need fast edges, then filter them out, for EMI.
 
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Offline awefTopic starter

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Re: Reducing voltage spike on transition
« Reply #4 on: May 23, 2017, 05:19:05 pm »
Oh I never even thought of it that way.  Thanks.  I'll give a test with a resistor "inline" with the scope probe later and see how it goes.  I totally forgot about termination and was thinking the pin driver was magically creating 7v.
 

Offline T3sl4co1l

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Re: Reducing voltage spike on transition
« Reply #5 on: May 23, 2017, 05:19:43 pm »
Fast logic signals can quite easily cause a large voltage drop across that little ground clip.

The world becomes very interesting when you consider "when is a ground not a ground", which for AC signals, is all the time.  Think what will happen if the ground clip is a relatively large impedance (like 100 ohms), and the probe-to-clip (at the coaxial tip) is a similar impedance (1000 ohms or so), and the impedance from ground clip to oscilloscope frame (i.e., the probe cable's outer shield impedance) varies between, say, 10 and 1000 ohms depending on frequency (because it's a transmission line and an antenna, being a wire through space).

Just for hand-waving's sake, you can imagine these impedances as resistances, and see how all the voltages and currents differ from the naive DC case.  In reality, they are of course impedances, that interact to create peaks and valleys as L and C resonate together, but for a qualitative illustration, resistors will suffice. :)

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Offline awefTopic starter

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Re: Reducing voltage spike on transition
« Reply #6 on: May 23, 2017, 05:29:47 pm »
Wow I haven't ever thought that far about how those different impedances are mixed in such a "simple" setup.

As a note, I am measuring a pin from the logic level converter and it's NOT connected to anything else.  So at the very least lack of termination seems like a very obvious issue. 

From there all the different impedances... well... I'm going to let it slowly sink into my head via the... mental impedances.
 

Offline David Hess

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Re: Reducing voltage spike on transition
« Reply #7 on: May 23, 2017, 10:30:25 pm »
Unless the circuit layout is poor, it is probably a problem with connection between the probe and signal; the ground lead needs to be kept short.

If there is a problem, then the easiest solution is usually what Siwastaja described with a low value of series resistance.  A good alternative however if feasible is to use a slower logic family.

 

Offline w2aew

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Re: Reducing voltage spike on transition
« Reply #8 on: May 24, 2017, 02:01:05 pm »
So I do have a ground pin, so I hooked up my probe to both GND and the signal pin. 

So for example OSC probe A - GND & 5v Signal Pin; OSC probe B - Admittedly no GND (I "believe" my Oscilloscope uses ground from probe A :o) and another 5v Signal pin.

I did probe the 3v3 pins and coming directly from the MCU there is "much less" of a spike.  So my guess is the probe is not "inherently" giving spikes.

But thanks for the note, if I notice spikes in the future I'll at the very least check to make sure my ground is connected (like it is now)

You might be interested in my video that demonstrates the affect of probe ground lead length on overshoot and signal quality:

YouTube channel: https://www.youtube.com/w2aew
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