Author Topic: Schematic symbol to indicate link of two different system grounds  (Read 2152 times)

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Offline beaker353Topic starter

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I have a schematic design I'm woking on that has a digital and analog ground that I will keep separate except for single well-placed tie point. Layout-wise, I know what I want to do works well electrically speaking. Schematic-wise I've historically used a little component symbol that looks like two side-by-side test points connected to indicate the link so it popery transfers over to the layout application. Works as long as I'm the only one reading to the schematic, but potentially confusing for someone else. I would like to start using something more standardized (I know, I know, I've seen the XKCD comic) as this particular schematic will go into permanent company records, but I'm not finding much consistency with what I can get my hands on. Any suggestions from the greater hive-mind on what I should be using? Thanks!

-EM
 

Online T3sl4co1l

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Re: Schematic symbol to indicate link of two different system grounds
« Reply #1 on: June 25, 2017, 06:00:42 am »
0. Don't.  Just don't.  You're likely making an EMC nightmare.  (And, the fact that you qualified that as "works well electrically speaking", makes me suspect you haven't tested it electromagnetically, i.e., measured its emissions or susceptibility.  Both of which are very important factors to an ADC -- especially one that is, apparently, sensitive enough to be considering layout options this aggressive!)
1. What you're looking for is usually called a "net tie".  Whatever tools you're using, there's probably a documented way to create this.  You can also use a zero-ohm jumper, as evb149 said.

Tim
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Offline beaker353Topic starter

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Re: Schematic symbol to indicate link of two different system grounds
« Reply #2 on: June 25, 2017, 06:24:00 pm »
Maybe I should of re-worded "works well electrically speaking" to "a well respected manufacturer applications engineer suggested I use a specifically designed and thoroughly tested power and grounding layout". He provided a Altium file as well as a graphic PDF, but I sure don't have the cash to spend on an Altium license. So I am basically re-creating this layout in my own EDA. It's a mixed mode IC chip with ADCs, DSP, and DACs, so there is no way I can keep AGnd and DGnd separate and still have the thing function correctly. I'll continue to use my little jumper schematic symbol I guess and add some text explanation. Unfortunately it doesn't appear that DipTrace has a NetJoin or NetTie feature built-in. I can manually define my own component and pattern, but it seriously ticks off the DRC and ERC in layout. I would gladly make the jump to Altium, but I just can't justify the price.

-EM

0. Don't.  Just don't.  You're likely making an EMC nightmare.  (And, the fact that you qualified that as "works well electrically speaking", makes me suspect you haven't tested it electromagnetically, i.e., measured its emissions or susceptibility.  Both of which are very important factors to an ADC -- especially one that is, apparently, sensitive enough to be considering layout options this aggressive!)
1. What you're looking for is usually called a "net tie".  Whatever tools you're using, there's probably a documented way to create this.  You can also use a zero-ohm jumper, as evb149 said.

Tim
 


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