SDADC inaccuracy

[hamdi.tn]

Hi everyone ,
I have this circuit, wired to an segma-delta adc ( stm32f373 ) and am getting some totally inaccurate reading.
adc input impedance is around 500K, Adc reference is 3.3V directly from power rail, R52, R53 and 1% R48 is 0.1%and a not represented resistor ( PT1000 )  is connected between SEM and Ground.
Am getting an irregular voltage drop across R52 and R53 ( between 11mV and 17mV)
am aware this is a terrible configuration , but any way to correct the reading without modifying the hardware, am not the designer of this circuit so i have no call to change the hardware.
My guess is i change those resistor with 0R resistor and attack the ADC directly with the voltage to measure or change their precision to 0.1% any better simple idea . Thanks

[PChi]

The STM32F4 series ADC uses successive approximation (I believe). I guess that the STM32F373 is similar.  The first stage is a sample capacitor that the source has to charge. For accuracy it needs a low source impedance. Are you performing many acquisitions/second? Reducing the number of conversions/s reduces the ADC input current.

[langwadt]

The STM32F4 series ADC uses successive approximation (I believe). I guess that the STM32F373 is similar.  The first stage is a sample capacitor that the source has to charge. For accuracy it needs a low source impedance. Are you performing many acquisitions/second? Reducing the number of conversions/s reduces the ADC input current.

but it won't change the error from the sampling capacitor charging through R53, changing that to zero would help.

And ~1.5mA through a PT1000 is alot

[hamdi.tn]

The STM32F4 series ADC uses successive approximation (I believe). I guess that the STM32F373 is similar.  The first stage is a sample capacitor that the source has to charge. For accuracy it needs a low source impedance. Are you performing many acquisitions/second? Reducing the number of conversions/s reduces the ADC input current.

but it won't change the error from the sampling capacitor charging through R53, changing that to zero would help.

And ~1.5mA through a PT1000 is alot

agree, it's 10 time more than it should , self heating will be a problem , but the designer think since the sensor is in contact with water over heat will be dissipated. i don't care much, his problem.
He refuse to use any kind of buffering in adc input to adapt impedance to save cost.

[dannyf]

totally inaccurate reading.

Sounds like you need a totally accurate solution,

Seriously, what are you talking about here? Your "totally inaccurate reading" may not be somebody else's "totally inaccurate reading".

Put some numbers / charts there so you can help others help you.

[tom66]

With some low impedance ADC inputs I've found adding a capacitor immediately across the ADC input and ground helps. The idea being that the capacitor (being much larger, 1~100nF) provides the sampling current needed.  This will of course reduce the bandwidth of the circuit and only works for occasional sampling.

[hamdi.tn]

totally inaccurate reading.

Sounds like you need a totally accurate solution,

Seriously, what are you talking about here? Your "totally inaccurate reading" may not be somebody else's "totally inaccurate reading".

Put some numbers / charts there so you can help others help you.

no i don't, and you don't need them

the thing is it's over expectation of the ADC input impedance can be enough high to guaranty that the voltage of the sensor is the same as the voltage in ADC input, and that 3.3V is enough stable to guaranty stable measurement, and the last thing ppl who designed the circuit are expecting is that self heating will not be a problem ( still to verify ) ...

What am trying to do is to find a way around all of that either by software or by a minor modification in passive component values.

With some low impedance ADC inputs I've found adding a capacitor immediately across the ADC input and ground helps. The idea being that the capacitor (being much larger, 1~100nF) provides the sampling current needed.  This will of course reduce the bandwidth of the circuit and only works for occasional sampling.

will consider that, i can go as low as 1 sample / second , thanks

[langwadt]

With some low impedance ADC inputs I've found adding a capacitor immediately across the ADC input and ground helps. The idea being that the capacitor (being much larger, 1~100nF) provides the sampling current needed.  This will of course reduce the bandwidth of the circuit and only works for occasional sampling.

you can still same fast, the capacitor just lowpass filter the signal you are sampling. What is needed is longer sampling time

afaict from this(page 26): http://www.st.com/web/en/resource/technical/document/application_note/CD00211314.pdf a 1K source impedance shouldn't be a problem





 

[dannyf]

What am trying to do is to find a way around all of that either by software or by a minor modification in passive component values.

Fairly easy to solve in software.

[hamdi.tn]

yap but i have 10 input like this, i think the best way to get over it , is to change the value of the pull up resistor to a higher value , the voltage given by the PT1000 will be minimalistic and the drop across R52 and R53 will be so little , i amplify this voltage with the amplifier in the STM32 and case solved... this my idea , am looking for a way to say to the dump who draw this that it's impossible to do it anyway else 

[Kalvin]

You might also want to measure the 3V power supply voltage used as the PT1000 reference. Averaging a few samples may help with noise filtering. Enabling the 3V used by the PT1000s only when the temperature measurement is needed would reduce self-heating problems.

[langwadt]

yap but i have 10 input like this, i think the best way to get over it , is to change the value of the pull up resistor to a higher value , the voltage given by the PT1000 will be minimalistic and the drop across R52 and R53 will be so little , i amplify this voltage with the amplifier in the STM32 and case solved... this my idea , am looking for a way to say to the dump who draw this that it's impossible to do it anyway else 

I'd say drop R53 it doesn't serve any purpose, though 1K shouldn't be  big issue

Try increasing the "sample time register" it gives the internal sampling cap longer time to charge, reducing the effect of R53, if that is really the issue

[langwadt]

You might also want to measure the 3V power supply voltage used as the PT1000 reference. Averaging a few samples may help with noise filtering. Enabling the 3V used by the PT1000s only when the temperature measurement is needed would reduce self-heating problems.

if the 3V is the same as used for the reference there is no need to measure it, the measured value is the ration between the precision 1K1 resistor and the PT1000 regardless of voltage

[splin]

[EDIT: I got the decimal point in the wrong place input impedance actually < 2.14Mohms so 17mV is not unreasonable]

Hi everyone ,
I have this circuit, wired to an segma-delta adc ( stm32f373 ) and am getting some totally inaccurate reading.
adc input impedance is around 500K, Adc reference is 3.3V directly from power rail, R52, R53 and 1% R48 is 0.1%and a not represented resistor ( PT1000 )  is connected between SEM and Ground.
Am getting an irregular voltage drop across R52 and R53 ( between 11mV and 17mV)

The STM32F373 has 3 16-bit sigma delta ADCs (SDADCs) as well as the usual 12-bit SAR ADC(s). Page 237 of the reference manual (RM0313) states that the input impedance is:

        Rin = 1/2/Fclk/C

where C = .543pF + .152pF * PGA gain (.5 to and Fclk is in the range 500kHz to 6MHz.

So to be seeing up to 17mV across R52 and R53 means something is seriously wrong - 17mV implies an input impedance of less than 2.1k!

Perhaps you have current flowing through the ADC's input protection diode - are you sure that you're not violating the Analog input signal range, which depends on the PGA gain setting and input mode, as specified in 13.5.13 (page 236) of the reference manual?

Is the processor's digital supply (VDD) the same as that connected to the SDADCs, (VDDSDx) and the other analogue supply (VDDA)?

Are all the voltage ratings specified in Table 19 (section 6.2) of the datasheet met? In particular:

     VDD         must be <= VDDA
     VDDSDx   must be <= VDDA
     VREFSD+  must be <= VDDSDx
     VREF+      must be <= VDDA

And:

• All main power (VDD, VDDSD12, VDDSD3 and VDDA) and ground (VSS, VSSSD, and VSSA) pins
  must always be connected to the external power supply, in the permitted range.
  
  
• The following relationship must be respected between VDDA and VDD: VDDA must power on
  before or at the same time as VDD in the power up sequence. VDDA must be greater than or
  equal to VDD.
  
  
• The following relationship must be respected between VDDA and VDDSD12: VDDA must power
  on before or at the same time as VDDSD12 or VDDSD3 in the power up sequence. VDDA must
  be greater than or equal to VDDSD12 or VDDSD3.
  
  
• The following relationship must be respected between VDDSD12 and VDDSD3: VDDSD3 must
  power on before or at the same time as VDDSD12 in the power up sequence.
  After power up (VDDSD12 > Vrefint = 1.2 V) VDDSD3 can be higher or lower than VDDSD12.
  
  
• The following relationship must be respected between VREFSD+ and VDDSD12, VDDSD3:
  VREFSD+ must be lower than VDDSD3.

The datasheet also specifies the common mode input range:

   a) In Single ended mode (zero reference)     - between Vssa and VREFSD+/gain
   b) In Single ended offset mode                      - between Vssa and VREFSD+/(gain * 2)

Otherwise perhaps your device is damaged, possibly static damage?

My guess is i change those resistor with 0R resistor and attack the ADC directly with the voltage to measure or change their precision to 0.1% any better simple idea . Thanks

I don't think that either of those is a solution. certainly changing to .1% resistors won't make any difference.

Splin

[PChi]

Scrub my first answer I should have read the reference manual.
My understanding is that you measured 17 mV across R52 and R52 which gives a current = 17mV/11k = 1.5uA.
If the SEM_ADC voltage = 1 V the input Analog input resistance = 1 V/1.5uA = 667 kohm.
Section 6.3.25 of the reference manual specifies the analog input impedance = 540 kohm typical, One channel, gain = 0.5, fADC = 1.5 MHz.
This looks like it explains the voltage that you measured.

[dannyf]

If the SEM_ADC voltage = 1 V

PT1000, by its very name, indicates that its nominal resistance is 1Kohm so the joint sits at ~1.6v.

The (low) input impedance, if you look at the formula, is caused by charging up / down the sampling capacitor.

Once you understand that, the solution is simple.

[hamdi.tn]

thanks everyone,

@splin , when i put a known voltage directly in the adc input, the reading are stable and most important all input give almost the same reading, so device is fine, the only source of imprecision is due to the gain error of the embedded amplifier.

@Pchi , it do
the adc input impedance is about 550K (frequency 1.3M, and capacitor 0.7pF, gain 1) the formula is (1/(2*f*c))
so with PT1000 = 1000R ( 0°C ) , the voltage at SEM = 1.571428V and with 550K impedance the voltage in the input should be around 1.540V , 31mV drop !

So this is a normal thing to happen, will shunt those resistor and try to read temperature 

[tszaboo]

The STM32F4 series ADC uses successive approximation (I believe). I guess that the STM32F373 is similar.  The first stage is a sample capacitor that the source has to charge. For accuracy it needs a low source impedance. Are you performing many acquisitions/second? Reducing the number of conversions/s reduces the ADC input current.

but it won't change the error from the sampling capacitor charging through R53, changing that to zero would help.

And ~1.5mA through a PT1000 is alot

agree, it's 10 time more than it should , self heating will be a problem , but the designer think since the sensor is in contact with water over heat will be dissipated. i don't care much, his problem.
He refuse to use any kind of buffering in adc input to adapt impedance to save cost.

To save cost. With a PT1000. What a total moron is the designer. A PT1000 if designed correctly, can measure 0,1C accurate. It deserves to be correctly driven, with reference voltage, and external ADC.

You can forget the imput impedance of an ADC, it doesnt work that way. The ADC has a short sampling period, when it connects a capacitor to its imput, so there is a sudden dip on the input voltage. If it is not driven correctly, this dip will make INL and DNL errors. The input impedance is a totally insignificant number, doesnt mean anything without the sampling time and the number of bits.

[hamdi.tn]

@nandblog,  yap i must heard this " to save cost " 1000+ time 

conversion time is 360 adc clock cycles (frq 1.3MHz) nbr of bits 16

[Siwastaja]

I can't see any reason to use an opamp to decrease output impedance with a PT1000 or any type of thermistor either. Just use a capacitor that is several orders of magnitude larger than the sampling capacitor. I always use 1µ ceramic and get great, stable, linear results. It provides almost infinitely small impedance, smaller than any opamp ever could, without offset, drift, cost and PCB real estate of an opamp. Of course you completely lose any bandwitdh there was, but who wants to sample a thermometer thousands of times per second? I would enable the power to the PT1000 for 100 ms every second, take a bunch of measurements and average them on CPU. With a 12-bit ADC, I usually just let the DMA take 16 measurements and sum them for a nice 16-bit number. At least for me, it's quite rare that you really use an MCU ADC to measure some really fast changing signals. You can get resolution and even accuracy out of cheap components by sacrificing the bandwidth, and the best thing: it's quite simple. So just lose that extra resistor between the cap and ADC input altogether or reduce it to a very small value.

[dannyf]

I always use 1µ ceramic and get great, stable, linear results.

1u may be excessive but I can see people using .1u for availability.

The number needed is far lower than that, however. The sampling capacitor is on the order of 5 - 7pf. So something 100x bigger than that, like 1n - 11n would be more than sufficient.

The thing you want to minimize is charge transfer from the circuit being sampled to the sampling capacitor. The parallel capacitor satisfies that.

It however limits how fast the circuit reacts to a fast changing signal.

[Siwastaja]

I agree 1µF is overly excessive for just providing low impedance for the ADC. 1µ serves another purpose, however - it averages the signal for noise removal, and by this I mean a wide spectrum of noise, not just over the ADC max Nyquist frequency.

Because it's not always practical to read out the ADC all the time and filter in software.

[hamdi.tn]

Thanks everyone, i changed those resistor with 0R and kept the capacitor 100nF, measures are good. will propose that to the designer, i can't see any need for them. but i think everyone here think that this circuit should be redesigned properly.

[splin]

Despite what some here have said the input impedance of the ADC *does* cause serious errors - as you have found. (I assume they don't realise that this is a sigma-delta convertor not an SAR). I calculated that if you were using the ADC to read the wiper voltage of a potentiometer wired between Vref and ground, the pot would have to be < 25 ohms to keep the error to less than 1/2 1 LSB (with the maximum error occurring at 33% of Vref)!

Fortunately the errors are calculable so you can easily correct them in software without changing your hardware at all. In fact I don't think I'd change the design at all - it seems to be pretty much spot on.

I've attached a spreadsheet to show the errors. Using a gain of 8 provides the best resolution - over 15bits. It does reduce the input impedance of the ADC by 8 but that doesn't matter if you are going to correct the results anyway.

R53 does create a significant part of the error but I wouldn't recommend removing it or reducing its value as I guess it's there for protection - presumably the PT1000 is remote from the PCB?

The spreadsheet assumes the ADC is converting continuously, which means that the capacitor has no effect on the DC value at the ADC input. If you want to use single, periodic conversions it gets more complicated because the voltage at the ADC input will drop steadily during the 240us of the conversion as charge is removed from C36. Also the starting voltage on C36 will be (R52 * the average current flowing into the ADC) below the PT1000 voltage. No current flows when not converting - and thus the average current is approx Vin/Rain * on/off duty cycle. In between conversions C36 will recharge through R48 and R52 to replace the charge consumed by the ADC during its conversion.

The 'VADC scaled' spreadsheet column shows the remaining error after applying a best fit correction between the 0C and 100C endpoints - ie. multiplying the measured value by a scaling value and adding an offset.

The chart shows the remaining error and the polynomial you could use if you want to reduce the error further. That's probably not worth bothering with given the integral linearity error of the ADC is specified as 35 LSBs maximum with the gain set at 8 - that effectively reduces your 16 bit ADC to less than 11 bits accuracy before you account for any other error sources including noise, gain drift with temperature etc! The actual input impedance of the ADC will also vary from part to part and to some extent with the input voltage and temperature, but you'd have to characterise those yourself as they aren't specified.

The ADC should be configured in 'single ended zero reference mode'. I would also recommend operating the ADC at 6MHz; although the higher clock reduces the input impedance and reduces the resolution slightly it should significantly reduce the ADC noise (the specs don't show the SNR for 1.5MHz and 6MHz with a PGA gain of 8 but at a gain of 1 it improves by 6dB).

The spreadsheet assumes the measured temperature range is 0 to 100 - adjust if not but ensure that the 'VADC after gain (V)' values don't go below 0V or above Vref. If they do you may have to adjust R48, but if that isn't sufficient you will have to reduce the PGA gain and thus lose some resolution.

Have fun,

Splin

[dannyf]

With no hardware change, it is fairly easy to calculate what the true voltage on the temperature sensor would have been. Only highschool math is needed.