Small FPGA recommendation

[AndyC_772]

Hi all,

I have a design which requires a small FPGA, and I'm struggling to find an appropriate device.

The logic requires 'a few hundred' logic cells, and includes an adder that needs to run at about 100 MHz.

My usual favourite 'go-to' device for this type of thing is the Altera Cyclone IV EP4CE6. It's the smallest device in the range, costs about £10 in modest quantity, and comes in a 144 pin QFP which works on a standard 4 layer PCB.

It's one of my all-time favourite components, but for this job it's overkill. What I really want is a device that's about 1/4 the size, both in terms of logic and I/O count, and (crucially) won't require microvias or other HDI just to fit it to the PCB. Something like a 32 or 48 pin QFN would be perfect, but the world seems much more keen on tiny little WLCSPs that are an absolute pain to handle unless you're already making something ultra-tiny.

It would be nice (though not absolutely essential) to use another SRAM based device that I can easily download from an MCU as part of the boot process. That eliminates a production step, and means upgrades are trivial as they're just baked into the main firmware.

Of course, it would need to be cheaper than the Cyclone IV too, otherwise there's no point swapping to a new family. I'm not constrained for board space, so the EQFP144 isn't strictly a problem as such... it's just going to have a lot of pins unconnected, which seems wasteful.

Any FPGA enthusiasts here have a favourite small, relatively recent, fast-ish device that they wouldn't mind sharing?

[Ice-Tea]

Something Lattice, I suppose...

Can be had for a buck/pc 

[Mr. Scram]

The Max II seems to appear in a lot of decent gear. Even though it's called a CPLD, it seems to be somewhere in between.

I'm not sure it meets your requirements, though. You'll have to check. Upsides will be the same development environment and not needing external flash.

[AndyC_772]

Something Lattice, I suppose...

Every time I've looked at Lattice I've come away with the same impression that ridiculously small packages are 'in', and that nobody is designing with regular 4 or 6 layer PCBs any more. Shame.

The Max II seems to appear in a lot of decent gear. Even though it's called a CPLD, it seems to be somewhere in between.

I know Max II very well, I've used them in numerous designs. Very old, though, and you don't get a whole lot of logic for your money.

I've just tried compiling my code and it does actually fit an EPM240, just about. Given the huge disparity in logic capacity, it's nowhere near as cheap compared to the EP4CE6 as you might think, though.

Meanwhile, I can pick up a suitable MAX 10 for about £2, but it comes in a stupidly tiny WLCSP package 

[Nauris]

Actel Igloo/e AGL030 with 330 LE's is available in 48-pin QFN (but these are flash-based). Actel Igloos are only FPGA's that are available in at least half-sane packages that I am aware of.

[Ice-Tea]

Something Lattice, I suppose...

Every time I've looked at Lattice I've come away with the same impression that ridiculously small packages are 'in', and that nobody is designing with regular 4 or 6 layer PCBs any more. Shame.

32 pin QFN? https://www.digikey.com/short/qt8n3n

[Mr. Scram]

I think the trend to have smaller packages is more than welcome. For a while it seemed that everyone was trying to cram as much pins on a FPGA package as possible, which isn't always conducive to usability.

[mark03]

Lattice ice40 parts are available in QFN packages, at least theoretically.  The nice big one (UP5K, 'big' is relative) does not seem to have been available in QFN for quite some time, despite being advertised as such.  You can find it on their $8 dev board (see thread in MCUs/FPGAs subforum), but it appears you can't actually buy one otherwise 

[Someone]

It would be nice (though not absolutely essential) to use another SRAM based device that I can easily download from an MCU as part of the boot process. That eliminates a production step, and means upgrades are trivial as they're just baked into the main firmware.

Lattice do small and cheap ICE40 versions in suitable packages with SRAM config, otherwise its back to flash and the Microsemi (Actel) parts of various families which meet your package and size requirements. Both should be very competitive in this size of device and cheaper than Intel (Altera) MAX10 parts.

[Cerebus]

Lattice ICE40 range

Sorry about the crappy formatting. You've got a choice of 32 QFN, 84 QFN (dual row), QFP100 and QFP144

Manufacturer Part Number   Description   Number of Logic Elements/Cells   Total RAM Bits   Number of I/O   Package / Case
ICE40HX1K-VQ100   IC FPGA 72 I/O   100VQFP   1280   65536   72   100-LQFP
ICE40HX1K-TQ144   IC FPGA 96 I/O   144TQFP   1280   65536   96   144-LQFP
ICE40LP384-SG32   IC FPGA 21 I/O   32QFN   384   -          21   32-VFQFN Exposed Pad
ICE40HX4K-TQ144   IC FPGA 107 I/O 144TQFP   3520   81920   107   144-LQFP
ICE40LP1K-QN84   IC FPGA 67 I/O   84QFN   1280   65536   67   84-VFQFN Dual Rows, Exposed Pad

[jaromir]

I think the trend to have smaller packages is more than welcome. For a while it seemed that everyone was trying to cram as much pins on a FPGA package as possible, which isn't always conducive to usability.

Exactly this.
Few years ago I had meeting with Altera FAE and I explained him why I need FPGA in small package - mostly because I had no need to design with 6 or 8 layer PCB just for BGA package, when all other components fit easily on standard two layer board with 6/6 specs.
He told me they have awesome FPGA with bazilion LUTs and dozen of 10G SERDES. I was like, OK, but I need something in TQFP44 or so. Yes, but we have this FPGA with one and half bazilion of LUTs and two dozens of SERDES. OK, but I need small FPGA... repeat ad nauseam.
At the end I asked him why they don't manufacture something in small packages - he told me because nobody is buying it. And the customers are not buying it, because they don't manufacture it. Catch 22.

By the way, right now I'm designing a product with the tiny ICE40 FPGA, just because of sane package and low price.

[technix]

This may be too large, but how about EP4CE22E22C8N? Cyclone IV in TQFP-144.

[AndyC_772]

Lattice ICE40 range

Thank you, I'll take a look at these.

He told me they have awesome FPGA with bazilion LUTs and dozen of 10G SERDES. I was like, OK, but I need something in TQFP44 or so. Yes, but we have this FPGA with one and half bazilion of LUTs and two dozens of SERDES. OK, but I need small FPGA... repeat ad nauseam.

I suspect this is only going to get worse following the Intel acquisition. Intel is a CPU company and they'll be looking to make larger, more capable FPGAs to do high performance computing.

People like me, who want an FPGA to drive ADCs, generate interestingly shaped waveforms and generally soak up discrete logic just aren't that interesting to them - even though the price/logic ratio is about 1000x worse for current smallish (Intel) FPGAs compared to, say, an STM32F4.

This may be too large, but how about EP4CE22E22C8N? Cyclone IV in TQFP-144.

Why would I choose EP4CE22, when I've already determined that EP4CE6 is overkill?

[mikeselectricstuff]

Altera and Xilinx don't seem interested in the low end  - Lattice ICE40 and maybe also MACHXO2 are probably worth a look. Mid-size packages with sensible density are still a bit of a rarety though - seems like a classic case of nobody buys them because nobody makes them,and nobody makes them because nobody buys them...

[AndyC_772]

Just for the sake of closure... a big 'thank you' to everyone who suggested Lattice ICE40.

As of an hour ago, we have 'blinky' 

[asmi]

I think the trend to have smaller packages is more than welcome. For a while it seemed that everyone was trying to cram as much pins on a FPGA package as possible, which isn't always conducive to usability.

This is what I used to think as well, until I actually started designing boards. Suddenly I realised that 256 pins is not that many... DDR3? 50-55 pins. 3.2 GBit/s USB3-to-FIFO? Another ~40 pins. Passive LCD panel? That's ~40 pin too. Midrange (~100MSa/s) ADC? 16 (bit) x 2 (diff) x 2 (channels) pins = 64 pins + a handful more for C&C.
Most recent design I've done with DDR3, FT601, LCD passive out + cap touch, and HDMI out - that consumed almost all available IO pins of Artix-7 in FBGA-256 package.
So...yeah. It seems like a lot of pins. But it's not.

[asmi]

Just for the sake of closure... a big 'thank you' to everyone who suggested Lattice ICE40.

As of an hour ago, we have 'blinky' 

These are great parts for "glue" logic, as they tend to be more capable than "traditional" CPLD while being cheaper at the same time. Too bad it's impossible to find ice40 Ultra/UltraPlus 4K/5K in QFN package on the market - one has to order them from Lattice.

[mark03]

These are great parts for "glue" logic, as they tend to be more capable than "traditional" CPLD while being cheaper at the same time. Too bad it's impossible to find ice40 Ultra/UltraPlus 4K/5K in QFN package on the market - one has to order them from Lattice.

How many do you have to order?  Will they sell ~ 10 at a reasonable price?

[james_s]

How's the software for Lattice? I've worked with both Xilinx and Altera CPLD and FPGA devices but Lattice is the other significant player that I have not yet tried. Generally I find Alera's Quartus to be nicer than Xilinx ISE but other things about ISE are superior. The programming dongles for Altera devices are also a lot cheaper and smaller than the Xilinx cables. The devices themselves I find to be roughly comparable at least for the stuff I'm doing, mostly it comes down to the software since you are locked into the device vendor.

[mikeselectricstuff]

Lattice Diamond is extremely similar to ISE

[Cerebus]

How's the software for Lattice? I've worked with both Xilinx and Altera CPLD and FPGA devices but Lattice is the other significant player that I have not yet tried. Generally I find Alera's Quartus to be nicer than Xilinx ISE but other things about ISE are superior. The programming dongles for Altera devices are also a lot cheaper and smaller than the Xilinx cables. The devices themselves I find to be roughly comparable at least for the stuff I'm doing, mostly it comes down to the software since you are locked into the device vendor.

Lattice have two sets of synthesis software, one for the Ice40 series and one for their other FPGAs. I haven't used the latter. The software for the Ice40s (IceCube) is simple, easy to use and very, very fast. I've run the same Verilog through IceCube and Quartus, simultaneously side-by-side. IceCube was finished before I could stand up to go and make a cup of coffee, Quartus was still running when I came back with the coffee.

[asmi]

How many do you have to order?  Will they sell ~ 10 at a reasonable price?

ICE5LP4K is available to order 500 parts minimum, which is 10 reels as far as I understand.
BTW - ICE5LP2K (~2K logic gates) and ICE5LP1K (~1K gates) parts in QFN48 package are still available in Digikey and Mouser, so if you need them you'd better grab them while you can.

[asmi]

How's the software for Lattice? I've worked with both Xilinx and Altera CPLD and FPGA devices but Lattice is the other significant player that I have not yet tried. Generally I find Alera's Quartus to be nicer than Xilinx ISE but other things about ISE are superior. The programming dongles for Altera devices are also a lot cheaper and smaller than the Xilinx cables. The devices themselves I find to be roughly comparable at least for the stuff I'm doing, mostly it comes down to the software since you are locked into the device vendor.

The software for ice40 family is IceCube. It is as bare-bones of IDE as it gets, although it's still functional, and ships with two different synthesizers, as well as cut-down version of ActiveHDL for simulations.
There is one subtlety - both IceCube and Xilinx ISE use same environmental variable to store license file name, so they will fight each other. I don't use ISE nowadays as I went into much more usable (in my opinion) Vivado, which doesn't require any license files for WebPACK edition, but keep that in mind if you plan to use both ISE and IceCube on the same computer.
As for Antel vs Xilinx - like I said above, for hobbyists like me Xilinx wins hands down due to including very extensive set of IPs for free with WebPACK edition of IDE, not to mention totally free Vivado HDL, which is just awesome tool for creating all kinds of processing cores. Oh - and did I mention that Microblaze softcore is also available for free in any configuration (none of that stupid "edition" business of Antel), and you can even build multicore MCU by putting several cores in single design, simple IPs for inter-processor communications like Mutex and Mailbox are also available for free. Infact MB softcore is so compact that you can easily stuff several of them even into smallest Artix chip!
To program Xilinx FPGAs I use Digilent's JTAG-HS3 cable, which plugs into standard Xilinx JTAG 2x7 2mm pitch connector and is natively supported by Vivado IDE - even live hardware debugging works with no issues. It's totally legit (unlike counterfeit Altera programmers which ebay is full of - this is very important point for me personally), and retails for only $59 - which is the price of two cheapest 7-series chips available for sale at the moment, and it is a one-time purchase.

[AndyC_772]

How's the software for Lattice?

I was apprehensive, given that I've been using Quartus since it first came out, and know it well. I was expecting something equally complex, with an equally steep learning curve.

Icecube2 is anything but. You get a way to select the chip, I/O standards and pinout, but that's about it. Under the hood it's running Synplify Pro, but you don't have to touch it.

The obvious omission - unless I've just not found it yet - is something equivalent to the Mega Wizard configuration tool for any built-in hardware blocks. Instantiating memory, for example, looks as though it requires either some specific, carefully crafted VHDL to be generated by hand and pasted into the source code, or alternatively, writing an accurate functional description of the behaviour of a memory block and hoping the synthesizer chooses to infer one.

I know some people prefer to work that way anyway, but I don't, and I think I'll miss being able to simply define (say) a 1k x 16 FIFO and add it to my project.

[Ice-Tea]

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