Transmission Line Avalanche Pulse Generator

[jahonen]

Howard Johnson states that even making perfectly rounded corners does not mitigate the excess capacitance (lower impedance regions!) at the corners. To mitigate the effect, one must remove much more material. That explains why in many microwave PCB's there are quite chamfered corners, but they are still 90 degree ones:

Layout professionals often point out that modern layout systems already round off all the outside corners, assuming that this rounding eliminates the square-corner effect. It doesn't. Rounding the corners removes 21% of the copper in the corner. Edwards[1] shows that you must remove 70 to 90% of the copper from a right angle bend to neutralize (to first order) the excess capacitance. Rounding removes only a small fraction of the required amount of copper. Rounded-corner right-angle bends work well in digital designs not because they are rounded, but because the corners are too tiny to cause significant problems in the first place.

[1] T. C. Edwards, Foundations of Interconnect and Microstrip design, 3rd ed.,John Wiley & Sons, 2000, ISBN 0-471-60701-0

Regards,
Janne

[jscm2000]

?1ns??

[G0HZU]

Interesting thread...

I can only suggest PCB places in the UK that deal in laminates like Rogers for small qty. I expect that they deal worldwide though.

Very local to me is Trackwise in Tewkesbury.
http://www.trackwise.co.uk/

We sometimes also use Labtech but I haven't used them for a few years now.

http://www.teledynelabtech.com

I'm pretty sure they are still based in Wales. For large qty multilayer PCBs with Rogers on the outside and FR4 inner layers we use Graphic or Exception but these places will be very expensive even for a basic Rogers board.

I can mill Rogers boards here at home on a T-Tech Router but not to the accuracy you need. I can normally mill track widths to about 1-2 thou accuracy but it isn't guaranteed and it sometimes takes a few attempts. I think you have a milling machine as well so I guess this isn't an option.

Have you tried simulating the meanders on something like Sonnet EM? you can probably do it with the free trial version as I think it allows up to 32Mb these days if you register for the free trial upgrade to 32Mb.
http://www.sonnetsoftware.com/

I can't advise on the precision SMD attenuators as we tend to use fairly average spec ones for SMD use.

Note: It's worth asking about etching tolerance for Rogers boards. Labtech are pretty good at getting low tolerance. We sometimes need ultra high accuracy in the PCB for things like notch filters in the GHz region or simple microwave BPFs. The more expensive places like Exception or Graphic are the top choice for this though. They can also advise on what they think the characteristic impedance will be of the finished GCPW transmission line.

[G0HZU]

I had a look at what SMD attenuators we have in our system and the usual suspects are either Barry or MiniCircuits.

The GAT range from Minicircuits are quite good and they are very small and cheap. But they aren't really what I would describe as precision attenuators.

http://217.34.103.131/pdfs/GAT-20+.pdf

The other option is to stick with SMD resistors and choose to make your attenuator using resistor values that have parasitics that can hopefully mimic a lossy transmission line when placed on your PCB.

The best behaved resistors in 0805 package tend to be in the 100 to 150 Ohm range as their impedance stays faithful up to the higher frequencies and you can make a pretty decent attenuator if you make up the values using combinations of these resistances. But the PCB will spoil this a bit once you place the resistors down on it and you may need to do some subtle matching to get very low return loss up at a few GHz.

Also, when asking about etching tolerance it's best to specify the copper weight because the available accuracy from the PCB maker probably won't be the same for different copper weights on the Rogers Laminate.  I tend to use Rogers 4003C or 4350 here at home on the milling machine. It is very hard on the tools though. Notably more wear compared to FR4.

In the old days (before they closed down) the best laminate for milling was GIL GML1000 as it was very easy on the tools and had decent RF performance. I've still use it as I still have some left but you might be able to buy some cheaply as obsolete stock and mill the board yourself or send out the GML1000 to a PCB place.
You can get it in 0.02" or 0.03" or 0.06" thicknesses.

http://www.apcircuits.com/resources/information/gml10060.pdf

[Marco]

Sorry for the necro, but in case you're still reading this ... did you ever run the sampling scope with envelope instead of averaging so you could determine the jitter?

[Jay_Diddy_B]

Hi group,

I spent a little time in the lab today playing with the Transmission Line Pulse Generator. This is the latest version:




The performance can be influenced by the way you build the circuit. This is a picture of the unit I built today:





And the performance, the rising edge, using a Tektronix SD24 in a 11801 mainframe (20 GHz):




and the big picture showing the pulse:




Regards,

Jay_Diddy_B

[T3sl4co1l]

Curious dip, seems to suggest the first... ah what is it... few millimeters? is kind of wonky.

Go figure!

Nice 100ps edge, not bad at all.

Tim

[Jay_Diddy_B]

Curious dip, seems to suggest the first... ah what is it... few millimeters? is kind of wonky.

Go figure!

Nice 100ps edge, not bad at all.

Tim

Tim and the group,

I determined that the spike on the leading edge came from the potentiometer. It was not really inductance, it was the time that it took for the signal to reach the pot. This was new to me. I found it by setting the pot to 0 Ohms. Those pots have a folded construction inside.

The dip following the peak, I believe is called 'dribble-up'. I am not sure what physical properties cause it.

I have done some fiddling with the circuit to reduce the distortions.

Here is the latest schematic:




A photograph of the output section:



This is the inductor that I used, it has a self-resonance frequency of 3.2 GHz:




These are the latest waveforms:








It has taken a lot of experimenting to get this waveform.

Regards,

Jay_Diddy_B

[T3sl4co1l]

Yeah pretty much... good luck adjusting anything at this level.  Either it's made perfectly, or it stinks.

Also, this is two layers still?  Probably some of the remaining bumpiness comes down to mismatch between resistors (tiny!) and traces (fat), plus higher order TEM modes in the PCB, or even across the width of the trace.  Without getting really, really involved (many spins, or EM simulations?), going to 4 layer would probably be the next major improvement.

Even the best Tek generators had some residual bumps.  I suppose at that point, you have to wonder if it's the generator, or the scope, or cables, or connectors... or bondwires, or what?

Tim

[Jay_Diddy_B]

Tim,

I am using 2 layer 0.062 (1.6mm) FR4 boards made by Itead. I am still using the original boards that I made, 10 boards for $15.00 so nothing exotic at all. I scrapped away the solder mask and made some cuts in the copper.

The resistors are standard 5% carbon film that I bought in a binder from eBay. I have been using 0402 and 0603.

The SMA connector that I used on this board is nothing special either some cheap ones that I bought from eBay.

http://www.ebay.ca/itm/10pcs-connector-SMA-male-plug-solder-PCB-clip-edge-mount-straight-M-/281161178633?pt=LH_DefaultDomain_0&hash=item4176831e09

I am not using any cables, I have the board mated to directly to the Tektronix sampling head. The scope may not be perfect, but I can check the scope with 17.5ps rt generators in the TDR head.


I will not try and make any more improvements. I think I will attempt to build a second one the same.

Regards,

Jay_Diddy_B

[3roomlab]

Hi,

The dimension of the transmission line are the same as the line that was used to generate this pulse:

I used this calculator:

http://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

I am also concerned about having solder mask on the line. I realized this after I sent it out. I will have to what happens when I get the boards back. I can always try scraping away the solder mask 

Jay_Diddy_B

i know this is an old thread, i was fiddling with the web calculator, i was thinking what if the whole trans-line was shrunk in size? ( i have zero experience in HF design)

example
Er = 4.2
width = 0.915mm (36mil)
gap = 0.153mm (6mil)
PCB = 1mm

Eeff = 2.696
Zo = 50.99

would shrinking the entire circuit help in improving the overall rise time?

[T3sl4co1l]

Rise is largely limited by the switching device, and things immediately around it (lead/bondwire lengths, traces and pads).  As far as I know, ~200ps is characteristic of avalanche physics and device geometry, so you're doing quite well down there.

Better risetime can be had from a step recovery generator, but these are also more tricky to drive (an already fast pulse is needed) and lower amplitude (a few volts? not that you need much).  On the upside, jitter is better.

Tim

[3roomlab]

Rise is largely limited by the switching device, and things immediately around it (lead/bondwire lengths, traces and pads).  As far as I know, ~200ps is characteristic of avalanche physics and device geometry, so you're doing quite well down there.

Better risetime can be had from a step recovery generator, but these are also more tricky to drive (an already fast pulse is needed) and lower amplitude (a few volts? not that you need much).  On the upside, jitter is better.

Tim

ok so i suppose the "shape" change of the trace/PCB affects something else (like what Jay said in earlier post) the jitter-y-jagged-noise of the output signal? (even if i build this i dont think i will see it properly in action, i have no fast scopes, so its more of a curious question)

[T3sl4co1l]

The length of the TL determines the length of the square pulse, and its impedance and dispersion control how flat the pulse is, and what the falling edge looks like (dispersion causes an anomalously slow falling edge, "drool" as it were).  A periodically varying TL (as one might expect from a sinuous trace) will have humps or ripples, the amplitude of which depends on how far off the impedance is.  Rounded or chamfered corners are better than solid square corners.  Even a gradual bend should be reduced in width, slightly.

Tim

[Jay_Diddy_B]

i know this is an old thread, i was fiddling with the web calculator, i was thinking what if the whole trans-line was shrunk in size? ( i have zero experience in HF design)

example
Er = 4.2
width = 0.915mm (36mil)
gap = 0.153mm (6mil)
PCB = 1mm

Eeff = 2.696
Zo = 50.99

would shrinking the entire circuit help in improving the overall rise time?

The challenge with making the transmission narrower, is manufacturing tolerances. You can check what happens if the gap is 5mil, 6mil or 7mil.

Free-Electron in his variation used a narrower transmission line than I did.
https://www.eevblog.com/forum/blog/eevblog-306-jim-williams-pulse-generator/msg186193/#msg186193


I do not have free_electron's version to test in my lab. My fast scope (20 GHz) requires a trigger pulse at least 40ns in front of the pulse that you are looking at so I could not test this version anyway.

Regards,

Jay_Diddy_B

[Kalvin]

Jay_Diddy_B,

Did you perform any tests or simulations what would happen if the ground areas around the transmission line was removed or pulled away from the transmission line considerably so that the EM-field would be almost completely confined between the transmission line (top layer) and the ground plane (bottom layer). To me it seems that the ground areas with the patched vias might reduce pulse quality.

For example, using the transmission line calculator http://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm with the following parameters

4.2
3.3 mm
5 mm - 10mm
1.5 mm

will give Z0 48.91 ... 50.43. Also, the tolerance to the track width is quite good. For example varying the track width between 3.1mm ... 3.3mm changes Z0 between 52.84 ... 48.54 (gap width = 10mm).

[Jay_Diddy_B]

Jay_Diddy_B,

Did you perform any tests or simulations what would happen if the ground areas around the transmission line was removed or reduced considerably so that the EM-field would be almost completely confined between the transmission line (top layer) and the ground plane (bottom layer). To me it seems that the ground areas with the patched vias might reduce pulse quality.

Kalvin,

There different kinds of transmission lines used on circuit boards.  There is microstrip which is a single trace over a ground plane. The width of the strip is determined by thickness of the board and the dielectric constant of the board. For a given board there is only one width of trace for given impedance.

I used a construction called co-planar waveguide. In co-planar waveguide the gaps between the strip and the ground plane influence the impedance. You can choose the width of the trace and vary the gap to keep the impedance constant. You can also make tapered sections to go from one width to another width.

There is also stripline where the conductor is between two ground planes.

I checked the impedance of the line using a TDR with 17.5ps rise time. With this TDR I can see impedance discontinuities in mated SMA connectors.

https://www.eevblog.com/forum/projects/transmission-line-avalanche-pulse-generator/msg358382/#msg358382


Regards,

Jay_Diddy_B

[Kalvin]

Jay_Diddy_B, thank you for the explanation. I removed my comment about the pulse quality as the ripple is quite modest. The tolerance to the track width seem to improve when the construction is towards the microstrip.

[3roomlab]

i put together this based on Jay's PDF. im not making the project cos i have no fast scopes to "calibrate", so i am just mucking around with creating eagle PCB layouts and schematics. i am interested to know if i am in the right ballpark esp on the transmission line and the entry point of the SMA (i editted the footprint so that it is all similar width to the 39mil 50ohm trace throughout, does this make sense?) pls ignore the incomplete via stitching for ground plane. this size of the board is based on the popular 2inchx2inch, and it seems it is also possible to fit in a LT1073 power supply on the flip side left corner.

instead of the OSC in the PDF, i am toying with a 6 gate schmitt trigger as oscillator and R-C phase shifting it to get different rising edges. (or maybe not, schmitt trigger have large performance drift?)

i can see the length of the transmission line at approx 20320mils long, i dont suppose there is any harm if i make it even longer?
(edit, while trying to find some reading material, i saw this PDF called corners-japan, which tells of some interesting experiments about right angled traces)

[T3sl4co1l]

Mind that there will be a very slight amount of coupling between side-by-side traces (very little, with the ground plane filling in the gaps, but it might be discernible on a faster scope?), and the bends have a lower impedance on account of the way the fields distribute across the width of a curve (the velocity is effectively faster on the inside corner), which also contributes some dispersion (falling edge 'drool').  Being in FR-4, it'll also be fairly "drool-y" due to the dielectric properties.  Which you can't really do much about, aside from perhaps an R+L (or a more complex network of some sort) at the termination.

Speaking of networks, I suppose the rise/fall time could be very slightly improved (no more than ~2x in the limit) by adding a small C or R+C in parallel with one or more of the output attenuator (series) resistors.  That might be worth trying, I mean, if you had a scope to play with of course.  (Nothing you'd bother with on the initial layout -- the extra pads would do as much to screw with the response as you'd be trying to fix.  But it's something that can be tried by stacking chip components, a perfectly cromulent prototyping approach.)

So, for what it is, it's fine, and unless you have over 1GHz of scope bandwidth to hand, you probably won't be able to tell the artifacts in the first place!

Tim

[juani_c]

In AN94, figure 8, the charge line is shown with an open end. Is that "charge line" similar to this "Transmission Line"?
Does the Transmission Line need to have an open end as well? I can't see that in the schematic.

I don't know much of Transmission Lines, sorry if this is a stupid question.

[Jay_Diddy_B]

In AN94, figure 8, the charge line is shown with an open end. Is that "charge line" similar to this "Transmission Line"?
Does the Transmission Line need to have an open end as well? I can't see that in the schematic.

I don't know much of Transmission Lines, sorry if this is a stupid question.

The terms 'charge line' and 'transmission line' have the same meaning in this context. It could be described as a charged transmission line.

The open end of the transmission is connected to resistor that is used to charge the transmission line. From a fast signal point of view, the high value resistor is an open circuit.

The circuit works by first charging the transmission. The charged transmission line is then connected to the output attenuator using an avalanched transistor. The transistor switched in this way is very fast.

The length of the output pulse is twice the electrical length of the transmission line. The speed of the propagation in the transmission is very close to the speed of light for an air line, slower for a transmission line with plastic or epoxy insulation.

The circuit makes a pulse that has a flat top. You need the flat top if you want to measure the rise time of an oscilloscope.

Regards,

Jay_Diddy_B

[daiguangming]

hi group
way i rise is not fast ?use ztx415

[T3sl4co1l]

I have no idea what's going on with that board there...

ZTX415 is slower (and more powerful), check the datasheet.  Waveform seems more or less reasonable.

Tim

[Insatman]

I posted about a charge line pulser with <600ps Trise using a simple 2N2222.  https://www.eevblog.com/forum/projects/avalance-jw-charge-line-pulser-for-step-waveforms-~45v-out/msg1405898/#msg1405898.

A photo of the output waveform below.  More detail in origional post including schematic.

Relatively cheap to build.