Tricks on getting a DC operating point simulation to converge?

[Dago]

I was working on this battery charger balancing channel (discharges one cell with a MOSFET) but getting the simulation to converge has proven to be rather difficult. It was working at some point, then I changed some component values and now it does not converge. With LTSpice it will just get stuck at "Stepping source: 100%" and will continue calculating indefinitely.

I've tried adding large value resistors from every node to ground, tried different opamp models, tried reducing the simulation tolerances (abstol and whatnot), tried different solver etc. but I am starting to run out of ideas. Any good suggestions or tricks?

Ps. I know it (probably) oscillates in the current configuration due to driving a capacitive load (FET gate) with the opamp, that is what I'd like to simulate and solve but the AC analysis also requires a DC operating point to be solved beforehand...

[Andy Watson]

There is nothing to check the gain of U5 - it will be operating as a comparator. Even if there was, it is being driven by U2 that has a gain of 1000. If this circuit converged it was probably because it was saturated at one of the supply rails. Step away from the simulator for a while and explain (if only to yourself) how this circuit works and what voltages you would expect - assuming stable conditions.

[Dago]

There is nothing to check the gain of U5 - it will be operating as a comparator. Even if there was, it is being driven by U2 that has a gain of 1000. If this circuit converged it was probably because it was saturated at one of the supply rails. Step away from the simulator for a while and explain (if only to yourself) how this circuit works and what voltages you would expect - assuming stable conditions.

U5 is operating as a voltage follower, like in the following constant current source:



Can you please explain what is the difference except I have an additional shifting/gain stage and difference amplifier for the current shunt? I can replace the difference amplifier with a V=I(R3) behavioral voltage source but it does not help.

Assuming stable conditions with a control voltage of 1 V (V5) there should be a current of 1 A going through R3.

[Andy Watson]

U5 is operating as a voltage follower, like in the following constant current source:

Ah, I think I see what you were attempting to achieve.

Can you please explain what is the difference

Well, this is the difference !

except I have an additional shifting/gain stage and difference amplifier

Consider any feedback loop. As you go around the loop there will be a certain gain and phase shift. When you get back to the where you started you are assuming that the signal will be negative/anti-phase such that the loop is stable. As frequency increases so does the phase-shift. At some (high ?) frequency the phase-shift will tend towards 180 degrees, i.e it will become positive feedback. Your mission is to ensure that when this happens the loop gain is less than one. In the example above, U1 will have been manufactured to be "unity gain stable", i.e. it is stable with 100% feedback. In your design you have added three op-amps worth of phase-shift and approximately 1000 times gain to the existing open loop gain of the op-amp.

Note, don't confuse the loop gain with the overall gain of the system. In general, as you decrease the system gain by increasing the feedback, you will be increasing the loop gain.

[sarepairman2]

perhaps you should solder the thing together at this point

[Dago]

Is that your simulation or your circuit that's not working? I have no time right now to check with all the parameters, but as you might have correctly stated this circuit is very prone to feedback induced oscillations.

Please post the LTSpice file so we can make some suggestions easily.

I'm not so concerned about the circuit at this stage (just something I quickly whipped up together), more interested in understanding when and why doesn't the simulation converge.

I have attached the most trivial example that does not converge (single opamp, fet and feedback from the current going through the resistor). This does work if I attach the opamp - input directly to R1.

[zlymex]

The circuit is probably not stable because of the capacitive load.
According to Tim Green of TI, there are six ways to make a circuit capacitive loadable. When comes to the current source, you can try one/some/all of the following:
 - use opamp of large drive current such as LT1010 in place of U6
 - add a 2k resistor between the output of U6 and the gate of M2
 - parallel a 100n capacitor to that resistor
 - use a feedback network of 1.8n capacitor and 100 ohm resistor in series for U5
 - add 2k resistor between U2 and U5
 - connect -in of U5 to ground by a network of 22n capacitor and 1k resistor in series

Also, refer to schematics of Agilent N3306A for some ideas.

[Kalvin]

Some [op amp] models converge easier than others. You may want to try with a simpler op amp model first to get the an approximate circuit working and then try with the real op amp model to tweak its performance. As you have already found out, tweaking the component values may help with converging. If the circuit is prone to oscillations, the simulation speed will typically vary from quite slow to unbearably slow compared to a stable circuit.