Author Topic: ultra low noise power supply design  (Read 10100 times)

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Offline OM222OTopic starter

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ultra low noise power supply design
« on: October 15, 2018, 05:12:30 am »
If you've read my previous posts, you'll know that I'm designing a miliohm meter. I am considering using 16 bit or 24 bit ADCs which require very accurate voltage references to operate accurately (resolution is there, but the numbers would jump all over the place if the reference voltage is not accurate). As far as I know, every ripple on the supply line carries through, so even when you have a linear regulator, it will give you the 5v that you need, but all the noise and ripple follow through. same would be true for the chosen voltage reference and so on. I saw dave's video about capacitance multipliers before the input of the LDO and thought it would be really nice if I use one, so I made this quick and dirty simulation:
http://tinyurl.com/y9z58vyj


The supply has 0.2V peak to peak 50Hz mains ripple and 0.2v peak to peak high frequency noise. I chose a really small shunt on the output to draw as much current as possible (worst case scenario for noise) as well as 1k resistors as to not choke the base current of the darlington pair. The simulation shows about 10uV peak to peak noise, but I'm not sure if this is a realistic value. I tried switching out the darlington pair for a N channel fet but the current draw drops to 1.1A and the fet dissipates about 13 watts  :o Can someone please help me understand why this happens and how much dropout voltage there would be across a fet vs a darlington pair setup. I also don't know if this method is good enough as the MCU also shares the same 5V line and it can create switching noise. I'm using the 8MHz internal oscillator as opposed to an external 16MHz which should help a lot with the noise problem, but it would be nice of someone knows a way of eliminating that all together without using another LDO just for the MCU.
« Last Edit: October 15, 2018, 05:14:03 am by OM222O »
 

Online T3sl4co1l

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Re: ultra low noise power supply design
« Reply #1 on: October 15, 2018, 12:08:57 pm »
Why is supply noise a problem?

What does a milliohmmeter measure?  Resistance.  What is resistance?

Resistance is defined by the ratio of voltage across a component, to the current through it:
V = I*R

If we have noise in V, we have an exactly* proportionate noise in I.  If we are measuring both, we have lost no signal (information about R) except when V and I go to zero**, which happens only rarely.

*Minus Johnson noise, which adds a noise voltage in series with the resistor, corresponding to its resistance and temperature.  This voltage is unknown, so introduces the same error in Vmeasured.  Or the Norton equivalent, and the proportional error in Imeasured, same thing.

**Close enough to zero for the purposes of the circuit, anyway.  Example: the least LSBs of your ADC, around whatever the zero or reference value is.

DC is itself a vulnerable method: there are many sources of small DC voltages, like thermocouples.  These can be swamped to some extent by using a larger excitation signal, or they can be nulled by using AC and filtering DC out of the measured signal entirely.

AC likewise has some drawbacks, because even at low frequencies, reactance is nonzero, and may be nonzero enough to matter.  We could address this with a properly phased detector (so we only measure the in-phase component: the resistance), or say by measuring at very low frequencies to begin with, or a selection of frequencies so we can analyze if the response is stable or not.

In a sense, noise is the perfect stimulus, because it has all frequencies at once, and by measuring the source and the response, we can solve for everything at once (I mean, given unlimited computing power and cleverness -- in this case, a Fourier transform would serve nicely).  You probably wouldn't want to bother going to such length, as there are easier signals that will do very nearly just as well -- just that you could.

The other thing: it would be nice to measure only voltage (or only current, but almost nothing measures current directly).  Which means we need another resistor, to convert current back into voltage.  Thus, we would have a resistance bridge, or at least a half bridge (a divider).

Best part about using an ADC in this way: the VREF doesn't matter either, it can be relatively noisy and indeterminate.  As long as it gives an acceptable result, you're fine.  All you are doing, is comparing the ratio of resistors, to the ratio of ADC steps.  The exact voltage is unimportant!

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Offline ogden

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Re: ultra low noise power supply design
« Reply #2 on: October 15, 2018, 12:39:14 pm »
The other thing: it would be nice to measure only voltage (or only current, but almost nothing measures current directly).  Which means we need another resistor, to convert current back into voltage.  Thus, we would have a resistance bridge, or at least a half bridge (a divider).

Best part about using an ADC in this way: the VREF doesn't matter either, it can be relatively noisy and indeterminate.  As long as it gives an acceptable result, you're fine.  All you are doing, is comparing the ratio of resistors, to the ratio of ADC steps.  The exact voltage is unimportant!

Right. Only precision component needed is low TC reference resistor. Further reading:

https://www.maximintegrated.com/en/app-notes/index.mvp/id/1753

and here:

https://e2e.ti.com/blogs_/archives/b/precisionhub/archive/2016/04/29/it-39-s-in-the-math-how-to-convert-an-adc-code-to-a-voltage-part-2
« Last Edit: October 15, 2018, 12:41:15 pm by ogden »
 

Offline OM222OTopic starter

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Re: ultra low noise power supply design
« Reply #3 on: October 15, 2018, 08:45:00 pm »
the best ones I can find have a 50 PPM TC which is about 0.1% for a temperature delta of 20C.
https://www.mouser.co.uk/ProductDetail/Vishay-Dale/WSC25151R000FEA?qs=sGAEpiMZZMtlubZbdhIBIM3Zc6FLjf4lFsfcXDgsnpk%3D

so you think the noise is gonna be the same everywhere regardless, but that's a bad assumption to make in my opinion (the noise will go through all the circuit, but to what degree? decoupling caps and other factors can change the amount of noise for each device on the board individually). firstly it requires use of star ground rather than a plane which results in high impedance traces which on their own can cause more error. also here we are working in uV sort of range for the resolution of even a 16bit ADC, let alone a 24 bit one. I think using a battery instead of a wall adapter is a far better option here (a 3S lipo would do just fine) but then battery life becomes a huge issue ... I think I'll use 2 LDOs with a fet based capacitance multiplier for the analog section
« Last Edit: October 15, 2018, 09:59:35 pm by OM222O »
 

Online RandallMcRee

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Re: ultra low noise power supply design
« Reply #4 on: October 15, 2018, 09:26:35 pm »
the best ones I can find have a 50 PPM TC which is about 0.1% for a temperature delta of 20C.
https://www.mouser.co.uk/ProductDetail/Vishay-Dale/WSC25151R000FEA?qs=sGAEpiMZZMtlubZbdhIBIM3Zc6FLjf4lFsfcXDgsnpk=
...

50ppm?
You can do so much better. PTF56 series has 5ppm. Susumu RG series is available in 2ppm.  Edwin Pettis sells 3ppm wirewounds. Etc.

 If you actually care!
 

Offline ogden

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Re: ultra low noise power supply design
« Reply #5 on: October 15, 2018, 10:03:53 pm »
You just don't take best resistor you can find, but calculate self heating and resulting drift of reference resistor in question. Resistor power and TC shall be matched to application and accuracy, no need to overpay/overengineer
 

Offline OM222OTopic starter

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Re: ultra low noise power supply design
« Reply #6 on: October 15, 2018, 10:11:23 pm »
the self heating of that specific resistor is basically negligible (about 10c for 0.1 watt but I'll be running it at 0.01 watts! (100mA at 1\$\Omega\$)) but the ambient temperature drift will change it's accuracy if I want to have at least 0 to 50C operating temperature range. the low TC resistors which you mentioned are not available at 1\$\Omega\$. It would be really impractical to parallel 20 or 30 resistors to get the 1\$\Omega\$ value, or even less practical to significantly beef up every other component in the system to handle it. (I want to have occasional short pulses of 1A if the value of the resistor is too small and my power source is 12v maximum).
Here is the current sink circuit (the test resistor will sit between the BJT and the 1\$\Omega\$ shunt):
http://tinyurl.com/ya38zxqq


if the top switch is connected, there will be 1A current draw (pulsed for a maximum of 100ms (It will be as short as possible when I finish my testing so that is a worst case scenario)) and the bottom switch chooses the 100mA current case. I will be using an SMD 4xSPST analog switch and a TLV9002 dual op amp if you need the specific part numbers.
« Last Edit: October 15, 2018, 10:17:07 pm by OM222O »
 

Online tggzzz

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Re: ultra low noise power supply design
« Reply #7 on: October 15, 2018, 10:25:41 pm »
If you want  a low noise power supply, you might care to study the classic vintage Power Designs 2020B, 0-20V, 0-2A, resolution 1mV. Spec: regulation=0.001%, ripple&noise=100uVpp, tempco 0.001% per degree C.

Having said that, I suspect you would benefit from continuing to explore your system design, rather than concentrating on one aspect (the PSU noise).
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline GigaJoe

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Re: ultra low noise power supply design
« Reply #8 on: October 15, 2018, 10:42:38 pm »
"  Power Designs 2020B " - when it was done, 1960 ?
I'm no in doubt it was advanced in this time ...   Like, want a programming: learn ENIAC :)

LT3045 - a microvolt RMS noise ...


 
 

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Re: ultra low noise power supply design
« Reply #9 on: October 16, 2018, 12:57:47 am »
"  Power Designs 2020B " - when it was done, 1960 ?
I'm no in doubt it was advanced in this time ...   Like, want a programming: learn ENIAC :)

LT3045 - a microvolt RMS noise ...

I'm not quite sure what point you are trying to make, nor how you expect it to help the OP, but you sound.... very young.

The key component in the 2020B is roughly contemporary with the Intel 80*86 family, and I have a suspicion that family is still being studied. However, I fail to see why you think processor families are relevant.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline ogden

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Re: ultra low noise power supply design
« Reply #10 on: October 16, 2018, 07:09:40 am »
"  Power Designs 2020B " - when it was done, 1960 ?
I'm no in doubt it was advanced in this time ...   Like, want a programming: learn ENIAC :)

LT3045 - a microvolt RMS noise ...
I'm not quite sure what point you are trying to make, nor how you expect it to help the OP, but you sound.... very young.

When you show your frustration regarding LT low noise regulators you sound .... very old ;)

He suggested to study modern approach of building low noise supplies by suggesting to learn from LT3045 which has two orders of magnitude better noise performance than supply suggested by you. Very relevant and helping.

Quote
However, I fail to see why you think processor families are relevant.

Both - ENIAC and voltage reference circuit of the 2020B are extinct
 
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Offline OM222OTopic starter

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Re: ultra low noise power supply design
« Reply #11 on: October 16, 2018, 09:33:45 am »
I also found that LDOs have quite a bit of noise on their own (best ones are about 100uV rms!) Are they rated like that due to the power supply noise and perform without noise if the PSU has no noise, or will they create their own noise?
 

Offline ogden

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Re: ultra low noise power supply design
« Reply #12 on: October 16, 2018, 10:06:27 am »
I also found that LDOs have quite a bit of noise on their own (best ones are about 100uV rms!)

Best ones like LT3045 have 1uV rms. Yes, generic regulators are noisy indeed. That's why there are "low noise" regulators and also "high output current voltage references".

Quote
Are they rated like that due to the power supply noise and perform without noise if the PSU has no noise, or will they create their own noise?

LDO noise is always own noise, measured using "clean supply". If you want to know supply noise filtering performance, then look for PSRR figure.
 

Offline Mechatrommer

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Re: ultra low noise power supply design
« Reply #13 on: October 16, 2018, 10:27:43 am »
I also found that LDOs have quite a bit of noise on their own (best ones are about 100uV rms!)
noise psrr
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Offline P_Doped

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Re: ultra low noise power supply design
« Reply #14 on: October 17, 2018, 03:50:51 am »
LDO noise is typically dominated by the internal reference designed into the LDO.  This noise contribution can propagate 2 ways:
1) The reference might be gained up to bring to the error amp.
2) The output of the LDO may have a feedback divider to feed the error amp.  That also gains of the reference noise seen at the error amp input, referred to the LDO output.
 

Offline GigaJoe

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Re: ultra low noise power supply design
« Reply #15 on: October 17, 2018, 04:57:52 pm »
guess it related to all voltage regulators ....

That puzzled me, is a "1µV" noise ...   Assuming Vref bandgap,  1.25V and noise 0.3 µVpp,  sooo ... 12V would be 3 µVpp .... I'm right ?
 

Offline ogden

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Re: ultra low noise power supply design
« Reply #16 on: October 17, 2018, 05:09:05 pm »
That puzzled me, is a "1µV" noise ...   Assuming Vref bandgap,  1.25V and noise 0.3 µVpp,  sooo ... 12V would be 3 µVpp .... I'm right ?

Thing is that LT3045 does not have voltage reference ;)
 

Offline Conrad Hoffman

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Re: ultra low noise power supply design
« Reply #17 on: October 17, 2018, 08:09:16 pm »
"Noise" is meaningless unless you assign a frequency bandwidth. That defines the problem well enough that you can talk about solutions. Then you have issues like popcorn noise that are more related to device type and may need selection to get what you need.
 

Offline Gerhard_dk4xp

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Re: ultra low noise power supply design
« Reply #18 on: October 17, 2018, 08:24:31 pm »
The industry standard BW is 0.1 to 10 Hz or 10Hz to 100 KHz.

<      https://www.flickr.com/photos/137684711@N07/24070698809/in/album-72157662535945536/         >

clearly shows the huge 40 to 50 dB advantage of the LT3042/3045 against the rest.
« Last Edit: October 17, 2018, 08:27:35 pm by Gerhard_dk4xp »
 

Offline Conrad Hoffman

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Re: ultra low noise power supply design
« Reply #19 on: October 17, 2018, 11:26:01 pm »
No question that's an impressive part just about everywhere, but one still needs to understand what their requirements for their project are. IMO, it's probably far better than the OP's needs and better than most people could build from scratch.
 

Offline iMo

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Re: ultra low noise power supply design
« Reply #20 on: August 19, 2019, 09:59:39 am »
Here is a design which may work. You may use an 780x in the loop as well (its noise should cancel itself in the loop). The advantage of the 317 (or 317L) is you get an over-current and over-temperature protection too.
 
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Offline David Hess

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Re: ultra low noise power supply design
« Reply #21 on: August 19, 2019, 05:14:59 pm »
Here is a design which may work. You may use an 780x in the loop as well (its noise should cancel itself in the loop). The advantage of the 317 (or 317L) is you get an over-current and over-temperature protection too.

The idea behind that design is at least 40 years old now.  You can find it in the earliest application notes for integrated regulators.

D1 should be bypassed to reduce its AC contributions to noise and frequency response.  D1 is replaced with a transistor buffer in some implementations.

Long ago I designed and built a bunch of 10 volt 1 amp "power references" using 7805s, LT1007s, and LM329 integrated zener references.  Enclosing the high noise 7805 within the low noise LT1007's control loop eliminated its noise contribution.  Pole-zero compensation was used around the relatively fast LT1007 and for lead in the output divider although I now know how to do it even better.  Load regulation was so good that it defied our ability to measure it using 7.5 and 8.5 digit voltmeters.
 
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Offline iMo

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Re: ultra low noise power supply design
« Reply #22 on: August 19, 2019, 05:48:12 pm »
..Pole-zero compensation was used around the relatively fast LT1007 and for lead in the output divider although I now know how to do it even better.  Load regulation was so good that it defied our ability to measure it using 7.5 and 8.5 digit voltmeters.

Sure, it is nothing new :)
I wanted to show how the noise contribution of the rather noisy part cancels out within the control loop in the simulation.
Could you share your schematics from that 7805+LT1007+329 combo, plz?

PS: with a 10n in parallel with D1 and with "10mVpp noisy" LM317
« Last Edit: August 19, 2019, 06:13:14 pm by imo »
 

Offline David Hess

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Re: ultra low noise power supply design
« Reply #23 on: August 19, 2019, 06:43:18 pm »
Could you share your schematics from that 7805+LT1007+329 combo, plz?

It was long ago although I do have them somewhere.  The result was just an extension of the schematic below.

The JFET was replaced with a 2N3906 emitter follower.  Buffering is not absolutely required because the operational amplifier could sink the 5 to 10 milliamps of current from the common pin of an LM109 or 7805 regulator however the extra power dissipation in the operational amplifier spoils low frequency precision.

An adjustable regulator like in your example avoids this issue by having a very low adjustment pin current but this low current also makes the level shift element noisy which is why I suggest bypassing it.  (1) Honestly when I have made this circuit using an LM317, I put a 1.2 kilohm (if not lower) resistor between the output and adjust pin to force the adjustment pin current to 1 milliamp (or higher) just for more predictable performance of the buffer and level shifter.

R2 was replaced with the pole-zero lead network.  (2) And of course there was a pole-zero feedback network from the output to inverting input of the LT1007 which was absolutely required for stability of the LT1007 which was only used for lower noise.  A slower operational amplifier will not require external compensation. (3)

(1) "Bypass" as used here just means placing a shunt capacitor across the element to lower its AC impedance.  In this case, it allows the operational amplifier to maintains low impedance at the adjustment pin at AC.  This is very common when zener diodes are used as level shifters because of their non-linear AC impedance.  My first instinct would be to use a 1 microfarad solid tantalum across it but most anything will help and the value is not critical as long as bypassing exists.

(2) At least it was a pole-zero network as laid out on the printed circuit board.  In practice, best performance required just a 220 picofarad capacitor across R2.  This gives a little boost to the phase margin for better transient response.

(3) As shown, the LM108A is *not* compensated for unity gain which would require only the 100 picofarad capacitor to ground.  Whoever designed this example was clever and took advantage of the required external compensation to add a zero to the frequency compensation using R1 for better high frequency performance.
 

Offline dom0

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Re: ultra low noise power supply design
« Reply #24 on: August 20, 2019, 12:48:30 am »
Real® low noise regulators with decent PSRR are built by using a precision current reference and a low-noise resistor to set the output voltage, because that allows you to put just a couple µF on that node to largely kill the reference noise. This is very much unlike slapping a cap on the "ADJ" pin of old linear regulators.

Typically ICs with this approach are also low drop, but there is nothing inherent to the technology requiring you to use a PNP SPE. It's not particularly hard to built this with OPs, though outdoing some modern components will be (very) challenging.

--

I'm not sure why you need particularly high resolution ADCs for a milli ohm meter, because the traditional approach to this problem is to use a LF oscillator and measure the amplitude of the current. No DC, no drift problems, you can use very narrow bandwidth, so little noise. I believe some meters even went as far as using synchronous demodulation to precisely only measure the resistive component, not any inductive components that may already arise in larger wire-wounds at a couple kHz.

--

Quote
As far as I know, every ripple on the supply line carries through, so even when you have a linear regulator, it will give you the 5v that you need, but all the noise and ripple follow through. same would be true for the chosen voltage reference and so on.

No. This property is called power-supply rejection ratio (PSRR), which typically peaks at 100-120 Hz and rolls off for higher frequency (loop gain), for regulators. For a Zener voltage reference the PSRR is approximated by the ratio of the supply resistor / current source impedance divided by the dynamic Zener impedance. (And PSRR w.r.t. output current for active current sources).

It is also easy to filter the output of voltage references.
« Last Edit: August 20, 2019, 12:55:07 am by dom0 »
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