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It's an LM5175; the LM5175 is a 4 switch synchronous buck boost converter with a positive voltage output.
Okay, stop right there. I was not familiar with this IC (if you design SMPSs long enough you'll learn to avoid highly specialized ICs like this) and ASSumed your referring to it as a buck-boost controller/converter* IC was accurate; in fact, it actually operates as a buck OR boost controller IC, seamlessly switching between the two topologies by selecting the appropriate pair of switches out of an H-bridge surrounding the energy storage choke (aka inductor).
Compensating such a converter is a nightmare** because the boost and buck topologies have very different transfer functions and making the output voltage adjustable over a wide range only adds to the misery (especially in boost mode). A much simpler approach would be - somewhat ironically - to use two separate converters: a boost to deliver a roughly constant 32-36V from the 12V nominal input, followed by a buck that can more easily be made to deliver an adjustable output, even in the face of wildly varying load current. Another advantage is that the boost converter does not have any ability to limit output current in the event of a short, whereas a buck does. Finally, separate converters are easier to troubleshoot and will teach you more about SMPSs in general.
One hint on frequency compensation: Nyquist/Bode stability generally requires that in a cascaded converter the first/earlier converter has a higher loop bandwidth than subsequent converters in the chain, but this is difficult to achieve when the first converter is a boost for reasons which are too tedious to explain in a quick forum post, so an alternate route - one employed by every power supply with a PFC front end, in fact - is to radically reduce the loop bandwidth of the boost stage and simply have it deliver a few more volts than is strictly necessary for the subsequent stage to effectively regulate. This is likely unavoidable as the boost converter becomes increasingly difficult to stabilize when the ratio of output voltage to input voltage exceeds 2, anyway, whereas the buck is basically the easiest converter to stabilize of them all.
I can vary the frequency anywhere from 100 khz to 600 khz depending on what would be more ideal. From my understanding a higher frequency means smaller inductances and smaller capacitances are required, but you lose more power in switching losses for obvious reasons.
Your understanding that higher frequency means smaller inductances and capacitances is correct, but lower frequency is always better for those new to SMPS design because the inevitable stray/parasitic Ls and Cs are less of a concern. So definitely stick to 100kHz, or whatever minimum this IC will let you get away with (I did not read the entire datasheet).
The controller also has the option to do DCM or CCM, with a hiccup option for lighter loads. CCM seems to be the better choice but given that my design can vary widely with load, which do you think would be a better option?
Well, this is a choice between two equally bad options, really. Switching between CCM and DCM (by turning off the MOSFET being used as a synchronous rectifier so only its body diode performs the rectification function) grossly affects the transfer function, adding even more misery already heaped into an ever-growing pile, but hiccup mode effectively runs the converter in "bang-bang" or hysteresis mode but with a generally much wider than usually tolerable error band, so output voltage regulation is quite poor. I honestly can't say which would be less bad - you'd have to try them yourself, but see above.
* - a rather informal distinction, but controller ICs typically require external switches while converter ICs have the switch(es) built in.
** - the usual solution - particularly for those new to SMPS design - is to simply roll off the loop bandwidth really early; like <300Hz for a 100kHz converter.