I'm just to lazy to draw a schem; take a logic level fet e.g. IRLZ44 pull it up to VCC with let's say 2k2 to the gate, connect the source over the sense resistor, maybe 0.1R, with VSS, tap source/resistor to the minus of the opamp, the opamp output (cathode side) over a diode to the gate (anode side). to the positive input you feed the DAC output.
Of course that's only if you switch the load on the low side, what is better because of the better fet parameters (Rdson).