@David_AVD and @nctnico... I'd like to keep this simple with passives like resistors/caps if possible. Also, I'd obviously like to minimize waste as much as possible. The high-side P-channel FET sounds like the best plan to me as far as turning the battery monitor on and off for sampling. Can you elaborate more @nctnico?
The three primary methods, in my experience, are:
1) high resistance with a cap to hold the value through the A/D sampling. This is simple and cheap, but you need to balance resistor size with cap size. Make the cap too big and you'll smooth through all transients in your battery voltage (this may or may not matter to you). Make the cap too small and the voltage will drop as the A/D does its sampling. You'll also be limited on how quickly you can sample it, since you need to give the cap time to recharge between samples. You'll also be constantly burning off power from the battery. How much power, and whether or not it's significant, depends on the resistors you choose and the application.
2) high resistance with an opamp buffer. This is more complex than #1 and still has the constant current draw, but you eliminate the smoothing error and you can sample it as fast as you want.
3) low resistance with a high side switch to shut it off when not in use. This is about the same level of complexity as #2, but you eliminate the smoothing error, the constant current draw, and you can sample it as fast as you want. However, the faster you sample it, the more power you pull from the battery.
All three have their place, and I've used all three in different applications. Which one you should use depends primarily on how often you'll be sampling the voltage and how accurate your measurements need to be. If you'll be sampling at 10 Hz or faster, I would lean toward #1 or #2. If you'll be sampling slower, say once per minute, then I would lean toward #3, but that's just me.