Question about STM32 ADC circuit

[Peabody]

This is probably a fine point, and may not matter either way, but I'd just like to know which way is correct, for future reference.

The pic is part of the schematic for my DSO150 Shell kit scope.  On the right, you will see analog power (VDDA) and analog ground (VSSA), which I assume power the ADC conversion process.  Then on the upper left pin 10 is the input point for the signal being converted from A to D (ADCIN).  Not shown, but ADCIN connects through a 150-ohm resistor to the output of an opamp buffer on the analog board.

My question concerns the two 100K resistors on the ADCIN input.  I'm not sure why they are there, but they are connected to the digital power and ground rails, and I wonder if they should instead be connected to analog power and analog ground.

It seems the existing setup might introduce digital noise into the ADCIN signal.  On the other hand, perhaps connecting the resistors to the analog rails might result in changes on ADCIN contaminating them via the resistors.

What's the right way to look at this?

This company produces a variety of scopes, and based on the published schematics, they're all done this way.  So maybe it's correct.

[Siwastaja]

You'd need to guesstimate the reason for those 100K resistors. How's the opamp powered? Can it be unplugged?

Maybe these resistors try to keep the ADC input biased midway in case the opamp is somehow disconnected? In that case, clamping diodes would make much more sense.

In any case, I can't understand why they are not connected to the filtered VDDA. Maybe this is a PCB layout limitation?

Most likely, the amount of "digital noise" through the 100k|100k divider is meaningless. These 12-bit on-chip ADCs are not that great anyway.

Maybe you could try to completely remove the 100k resistors.

[Peabody]

You'd need to guesstimate the reason for those 100K resistors. How's the opamp powered? Can it be unplugged?

Maybe these resistors try to keep the ADC input biased midway in case the opamp is somehow disconnected? In that case, clamping diodes would make much more sense.

In any case, I can't understand why they are not connected to the filtered VDDA. Maybe this is a PCB layout limitation?

Most likely, the amount of "digital noise" through the 100k|100k divider is meaningless. These 12-bit on-chip ADCs are not that great anyway.

Maybe you could try to completely remove the 100k resistors.

The pic below shows the relevant portion of the analog board.  It's a separate board that connects to the main board only through header J2.  The opamp is always on, but it would be possible to disconnect the entire analog board while the main board is powered up.  So I think your explanation is the correct one.  The ADCIN signal goes through 150R at the opamp, and another 100R at the processor, but 250R in comparison to 100K, or even 50K in parallel, means there would be very little wave-shaping effect from the 100K's.

I don't think there are any layout considerations.  VSSA is pin 8, VDDA is pin 9, and ADCIN is pin 10.  So everything is right there.

This is all the smallest SMD stuff in this area, so while I could remove the 100Ks, there's no way I could put them back in if they are actually needed.

But it seems you agree that in theory at least the resistors should connect to VDDA and VSSA, and not to the digital rails - in case it makes any difference at all.

[Brutte]

STM32 come in several flavors w.r.t. analog pins availablility:
- the ones where Vdda is internally connected with Vref+ and Vssa is internally connected with Vref- (low pin count),
- the ones where these 4 pins are separate (medium to high pin count)
- (maybe there are also those extra low pin count where Vdd==Vdda==Vref+ that I am not aware of)

Analog circuitry does not use varying amounts of current so this Vdd==Vdda is not an issue as long as there is filtering provided and draw is constant. Besides ADC itself has a decent PSRR. However, tying Aref+ to Vdd of a 72MHz uC is a misunderstanding as Vdd jumps like crazy. Rejection ratio of Aref is exactly 0dB, by design.

And IMHO the best ADC jamming effect on such Vdd==VAref+ is by just toggling IOs while ADC is converting..

If you want some experimenting what jams STM32's ADC then you can use this.