I'd have thought the limitation was simply that mains voltages require physically large transistors so as not to break down, and that means high gate capacitance, which in turn means significant energy is required to charge and discharge the gate every time the FET switches.
The 'sweet spot' ends up being at a much lower frequency than it does for low voltage converters.
This is close, but also like I said, not the be-all-end-all, of course.
The main thing with capacitance is it scales, so it's not as big a deal as you might think.
It used to be that high voltage transistors had a very unfavorable scaling, that Rds(on) went up as the square of rated voltage, while keeping the die size constant. So for a given die size, a proportionally higher voltage rating would handle current as the inverse square, and therefore power handling goes as inversely proportional. So you need a proportionally larger device for the same power level, and it gets very prohibitive to operate at very high voltages (examples: flyback or push-pull topology on 240VAC, let alone 400-480VAC industrial supplies).
Since the introduction of super-junction transistors (what, within a decade I think?), the scaling has been brought down to proportional, so HV transistors, watt for watt, perform as well as conventional types.
What does remain is the reality of impedance and scaling. It's not so hard to make a 1MHz switcher at, say, 30V 3A, because the average impedance is around 10 ohms, trace lengths are small and capacitances are modest. The resonant impedance Z = sqrt(L/C) isn't hard to match. Typical devices might be around 5nF (depending on what voltage you're measuring it at, of course), and although you could try building it with strays as low as 5nH (Z = sqrt(5n/5n) = 1 ohm), more would probably be desirable to reduce switching loss. The time constant sqrt(LC) = 5ns is a sufficiently small fraction of the period (1000ns) that good, crisp switching can be had.
Whereas, a 1MHz, 100W switcher following an active PFC stage has to deal with 400VDC and 0.25A, an impedance up around 1600 ohms. You need very low capacitance to do this -- to achieve the same conditions as the low voltage converter, you'd need less than 125pF and 0.2uH. The former is not too bad, really, considering it's only a 1 or 2 amp transistor; and the latter is practically trivial (0.2uH is many inches of twisted pair, for example).
But you see the sweet spot actually depends on power. If this were a 500W or 1000W converter, the impedance would be down around a nice, cozy 100 ohms, and the L and C figures are pretty easy to handle. Doing a very low power converter, like a 5W phone charger, at the same supply voltage, is harder -- in the 10s of kohms, so it's very sensitive to capacitance.
Doing a very high power converter has the inverse problem, with achieving low enough stray inductance; over 10kW, you probably wouldn't be able to do it with single transistors, and would instead require multiple modules and power combining networks. (This is exactly what commercial radio transmitters do, to realize 50kW at 100MHz and up -- without resorting to vacuum tubes, that is.)
Ultimately, the problem comes down to: how far is the inverter impedance (sqrt(Lstray / Cj)) from the impedance of free space, or of typical transmission lines in the circuit (since trace geometry generally results in impedances less than the impedance of free space, and dielectrics reduce that further). The lengths of the transmission lines (because, ultimately, all traces and pads on a PCB, all wires through space -- everything is transmission lines), and their impedances, define the limits of the circuit. If they're too different to implement a switching circuit, you have to resort to LC (or equivalent) tuning, and reduced efficiency. In other words, RF black magic.
Tim