Author Topic: Physical insta-button box design issue  (Read 837 times)

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Offline dmgTopic starter

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Physical insta-button box design issue
« on: April 22, 2018, 09:01:35 pm »
Hi,

Just for fun I decided to design and build a phisical insta-buttons box (a box with a speaker which plays a short sound when you press a button, but with five buttons). My main design goal was to use as many chinese IC's as possible and no programming required. I could have used a cheap Cortex M MCU to read sound from a memory and play that  through the integrated DAC with high quality, but I decided to go an unconventional way, again just for fun. I have assembled the thing and it works except for the power saving disconnect switch, and I can't see where I failed in the design. I'm attaching the schematic.

So, the design revolves around the JQ6500 chinese music player IC. This IC is quite cheap and is usually used in cheap audio player modules. It can read mp3 audio data from either a SPI flash or a microSD card, and you can upload data to the SPI flash through USB. There are more modern IC's nowadays that do the same but I coudn't buy those in IC form, only as modules, so JQ6500 it is. This chip has an ADC to read push buttons (ADKEY). There's a pullup to 3.3V and each button engages a pulldown resistor and the IC just reads the voltage and plays the corresponding sound (5 keys dedicated to 5 sounds (in alphabetical order) and two volume keys). The JQ6500 is supplied by a voltage from 3.4V to 5.5V and includes an internal 3.3V regulator to supply the SPI flash and/or the microSD. There's a BUSY pin which goes high while a sound is playing, and goes low when idle.

So I decided to use 3xAAA batteries as the power supply and, to save power, I designed a mechanism to save power. My goal was a power consumption of single digit uA while idle, and being able to wake up the thing by pressing any button. The soultion I came up with was to use a voltage supervisor and cut the ground line with an N channel mosfet.

The circuit should work as follows:
Starting from IDLE state, T1A should be OFF so SGND and GND are separated, and no IC on board except for the voltage supervisor (U3) should draw any power. R11 acts as a weak pull-up to the ADKEY line, very weakly pulling it up to VBAT (4.5-ish volts). As the GND line for JQ6500, both audio amps and the serial flash is opened no current should leak to the 3.3V voltage rail.

Whenever ANY button is pressed, the voltage at ADKEY goes below 3V, which is the threshold of the voltage supervisor. When that is detected, the voltage supervisor's RESET pin goes low (it's a push-pull output). That tuns on T1B which also turns on T1A, joining GND to SGND.

In that moment the JQ6500 should turn on and its internal 3.3V regulator should  start, the JQ6500 should boot, read the ADKEY line and start playing the corresponding sound. In that moment, the BUSY pin goes high and should keep T1B ON, even if the user  stops pressing the button. Also, if the user releases the button before the JQ6500 boots but after the 3.3V regulator goes up (thus raising ADKEY voltage above 3V), the voltage supervisor will still keep the RESET pin low for a second, giving time for the JQ6500 to boot. Also C9 keeps the mosfet ON for a while.

When the sound stops playing, BUSY goes low, T1A's gate and C9 discharges through R17, T1B turns OFF and it's back to IDLE state.

However that's not what happens. What happens is that on IDLE state GND stays 1V above SGND (using a voltmeter, if you put the positive lead on GND and the negative on SGND you read 1V). T1A's gate stays at 0.9V with respect to SGND (-0.1V to GND). Its threshold is around there, so I think it's ON. 3.3V to GND measure 3.3V, and 3.3V to SGND measure 4.3V. I can't measure the current it's consuming in this state at home (where to buy an uCurrent in the EU?) but will do some day at work where I have way better equipment.

When I press a button the voltage suppervisor detects it and the correct sequence happens (T1A goes full ON, T1B's gate goes high to 4.5V, thing starts playing sound, BUSY pin keeps T1B's gate at 3.3V, sound stops, BUSY goes low, T1B goes idle), but I think it never fully turns off, but I'm not sure why. Any clue? I'm sure I did something dumb with the design but I can't see it.
« Last Edit: April 23, 2018, 12:12:26 pm by dmg »
 

Offline slugrustle

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Re: Physical insta-button box design issue
« Reply #1 on: April 23, 2018, 12:28:04 am »
Quote
T1B's gate stays at 0.9V with respect to SGND (-0.1V to GND). Its threshold is around there, so I think it's ON.

Do you mean T1A? T1B's gate voltage should be referenced to VBAT. Having gate to source voltages for T1A and T1B would be helpful.

If T1A's gate is 0.9V relative to SGND, that means 9uA is flowing from VBAT through T1B and/or U2 BUSY back down to SGND. Try removing D4. If T1A's gate voltage drops to 0, I would guess that the 9uA is leaking through the clamp diodes or output mosfets on GPIOA1 in U2.

In the idle state, I would expect the voltage of GND relative to SGND to be VBAT minus the lowest voltage drop across whatever is connected between VBAT and GND. In your case, it sounds like that's the 3.3V regulator inside U2. VBAT to SGND is your 3xAAA batteries in series, and you're saying 3.3V to SGND is 4.3V. Somehow, there is a leakage current through T1A and it seems to have biased your 3.3V regulator on. I'm curious what the voltage is between VBAT and 3V3.

Edit: I just noticed the 73k from 3.3V to GND. T1A is not just leaking; it's on. 3.3V is sourcing at least 45uA for those resistors, then there's its own ground current and whatever U4 draws in idle.


« Last Edit: April 23, 2018, 12:43:42 am by slugrustle »
 

Offline dmgTopic starter

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Re: Physical insta-button box design issue
« Reply #2 on: April 23, 2018, 12:14:01 pm »
Quote
T1B's gate stays at 0.9V with respect to SGND (-0.1V to GND). Its threshold is around there, so I think it's ON.

Do you mean T1A? T1B's gate voltage should be referenced to VBAT. Having gate to source voltages for T1A and T1B would be helpful.

If T1A's gate is 0.9V relative to SGND, that means 9uA is flowing from VBAT through T1B and/or U2 BUSY back down to SGND. Try removing D4. If T1A's gate voltage drops to 0, I would guess that the 9uA is leaking through the clamp diodes or output mosfets on GPIOA1 in U2.

In the idle state, I would expect the voltage of GND relative to SGND to be VBAT minus the lowest voltage drop across whatever is connected between VBAT and GND. In your case, it sounds like that's the 3.3V regulator inside U2. VBAT to SGND is your 3xAAA batteries in series, and you're saying 3.3V to SGND is 4.3V. Somehow, there is a leakage current through T1A and it seems to have biased your 3.3V regulator on. I'm curious what the voltage is between VBAT and 3V3.

Edit: I just noticed the 73k from 3.3V to GND. T1A is not just leaking; it's on. 3.3V is sourcing at least 45uA for those resistors, then there's its own ground current and whatever U4 draws in idle.

Yes, I meant T1A, it's corrected now. I confirmed that the transistor is in fact on. I will remove D4 and see what happens.
 


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