Sounds to me like a logic issue.
Both channels go to the S-ASIC for sampling, and then go to 2 ADCs. After that they go to the D-ASIC for display. Since they are parallel channels - If one channel would fail - why would it inhibit the other? That is why I am thinking some switching logic (or else turning on Channel A causes a problem elsewhere).
There is a version of the service manual online with full schematics.