PG goes to pin 5 of CD4069UB, the output of pin 5 is pin 6. I misread the CD4069UB diagram last night and was looking at the functional diagram, whos input/outputs are in a different order than on the packaged view of the diagram.
So, correction, pin 6, the output of the inverter, goes to pin 3, the input of another inverter (same package), the output of which (pin 4) goes to pin 13 of DM74LS14 (located under the KBC). DM74LS14 is listed as a Hex inverter with Schmitt trigger inputs. The other end of this inverter is pin 12, which goes to pin 9 of SN74F32 (2-input OR gate). Pin 9 is one of the inputs to be OR'd. The output of this OR gate goes to pin 146 of UMC 482 chipset, which it labels as RSTIN. The other input to the OR gate (SN74F32 pin 10) is the output from DM74LS14 (pin 6). The input to pin 6 is pin 5, which is connects to Vcc via a 10K resistor in parallel with a diode. Looks messy in words.
great, you identified reset circuit.
Pin 4 of CD4069UB also connects to a 1K resistor, which connects to capacitor C14 in series, which goes to GND.
you drew it wrong on diagram (cap to Vcc instead of Vss), I noticed when logic transitions didnt add up :-)
so here is what happens:
power on, PG starts low -> 6 of 4069 High -> 4 of 4069 Low -> 12 of 74LS14 High -> 8 of 74LS32 High -> RESET is active, system is stopped.
power stabilizes, PG goes High -> 6 of 4069 Low -> 4 of 4069 still pulled Low while capacitor is charging -> 12 of 74LS14 High -> 8 of 74LS32 High -> RESET is active, system is stopped.
PG High, nano/microseconds passed -> 6 of 4069 Low -> 4 of 4069 cap finally charged, letting it go High -> 12 of 74LS14 Low -> 8 of 74LS32 Low -> RESET is inactive, system starts.
The other end of that 1K resistor also goes to pin 6 on UMC 206. Might be best if I draw all this out. See attachment. Do you still want me to draw the circuit diagram for the rest of the CD4069UB pins? PG only goes to pin 5 of 4069. Some of the other 4069 pins seem form the oscillator circuit with Y2, probably for the RTC.
https://en.wikipedia.org/wiki/Pierce_oscillator standard RTC oscillator on older boards.
Its enough info to check if this circuit works as advertised.
On the working board (and with the PSU powered on), if I hold down the reset button, the logic level of UM482 pin146 is 5 V. Immediately when I release reset, logic level is 0 V and stays there. The outcome is identical for that of the dead board.
=manual reset is working
On the working board, UM206 pin 6 is 5V always. On dead board, it is the same result.
just to clarify, we are talking
nanosecond pulses here, are you eyeballing the scope, or did you actually set up trigger?
you need to setup scope to trigger on channel 1 high logic level, while the other probe is capturing our event. Then scroll thru the capture and find the reset pulse. Rest at the end of post.
Back on track. UM482 pin 11 (PDC), starts out at 5 V when holding down RESET button, then bouces around a bit during power on, and ends up being an inconsistent series of pulses in the 8-22 KHz range. On the dead board, pin 11 stays at 5 V. However, if I hold the RESET button down for about 4 seconds, then release it, pin 11 shows a pulse train in the 500-800 KHz range. It is not the same pulse train as on the working board. Further goofing around with the reset button, and pin 11 can sometimes be made to stay at 0 V. Not sure what any of this means.
PDC was a red herring, its a signal generated by CPU (DATA/CONTROL), nothing to do with powergood/reset. I mentioned it because it sounded good with that P in front, almost like Power_something
. BUT! what you wrote here suggests CPU IS actually working. DATA/CONTROL signal is generated _only_ when CPU tries to execute something.
What it means is earlier " ran the two systems with the probe on the CPU's RESET pin. On the working board, at hard reset, the RESET pin goes to Vcc, then remains at GND. On the defective board, the RESET pin stays at Vcc" wasnt entirely accurate.
I suspect Im going too fast, throwing 10 things at once and expecting you to keep up, we need to slow down.
Its also OK to remove the KBC to get a sign of life? If I remove the ISA card, what is the sign of life? PC Beep perhaps?
YES. For the third time
Lets start with BAD board stripped out, no ram, no cache, no bios, no KB controller, no ISA cards, no keyboard. Just motherboard with AT supply,20MHz clock gen, and RESET button wired up. This is your base line.
First step setup Oscilloscope, trigger on channel 1 rising edge >3V. 4 captures, Power cycle for capture:
probe1 on +5V, probe2 on PowerGood
probe1 on PowerGood, probe2 on Pin 6 of UM82C206
probe1 on PowerGood, probe2 on Pin 146 of UM82C482
probe1 on PowerGood, probe2 on Pin 5 of UM82C482
Trigger set to channel 1 falling edge <3V. 1 capture, press RESET to capture:
probe1 on Pin 146 of UM82C482, probe2 on CPU reset pin (or Pin 5 of UM82C482)
play with timebase so you get both events on the screen (if there are events on both channels), take screenshots.
Btw this is why I suggested that $6 dev board, its faster to setup and capture everything at the same time than constantly swapping scope probes around.