Repair of Solartron 7081 SN#718

[pigrew]

This thread will detail repair efforts of a Solartron 7081, specifically unit #719. I purchased it from eBay, and it was damaged in shipping. Prior to my acquisition, someone had opened it up and forgot to replace the board mounting screws. This allowed some of the PCBs to float loose in the enclosure, breaking plastic standoffs, the GPIB connector, and VFD (among other things). In addition to these issues, there are age-related faults (capacitors and optoisolators failing).
After initial repairs (replacing capacitors, reconnecting wires, and updating/reprogramming the firmware), the meter turned on and seems reasonable well calibrated (though very noise with the covers off). Major outstanding issues that must be corrected include bad optoisolators and an aged Schaffner power inlet module. I will continue using it headless for the time being.
My plan to create posts in this thread detailing the individual repairs I’m making, and provide links in this post.

In addition, I’ve started looking at the floating supply firmware using the xdasm disassembler (It looks like some work was previously done, but I can’t access it since I don’t have an IDA pro license). I’m posting my work on my github page. I’ll also add some other documents to github, like a table of the modern replacements of the various components I’ve replaced.

Work Completed:

• Replace board standoffs
• Replace all electrolytic capacitors (about 1/3 had failed)
• Change RS-232 to 9600 Baud
• Reattach range switch plunger (switch was damaged in transit)
• Refreshed NVRAM
• Reprogrammed EPROMs with updated version
• Repair GPIB cable
• Replace mains filter
• Replace all optoisolators (PLL is unstable, optoisolators are a red herring; mains line seems noisy, and not triggering well)
• Replace settings-storage battery (replaced with super-cap)
• Replace RTC battery and set date and time
• Replace the VFD
• Replace input terminals with cheaper model (Chinese LEMO clones)
• Apply extended autozero pre-delay firmware patch

Work to do:

• Characterize noise, to see if further repairs are needed
• Test GPIB
• Clean the analog boards? (Lots of rosin left especially unused testpoints, this can’t be good)
• Build cables using the LEMO-style connectors (low quality cables done)

Possible other things:

• Retrofit high impedance nodes with PTFE standoffs
• Thermal insulation around the Zener and thermometer

And for those really interested, there is a plaque on the back describing which modifications have been made. “A” has been scratched off, as have 1 through 10.

[pigrew]

(second post, in case I need it)

[tggzzz]

Replace all optoisolators (PLL is not consistently locking)

Try tweaking C807. Floating logic sheet 5, rear right corner lower board.

[pigrew]

Replace all optoisolators (PLL is not consistently locking)

Try tweaking C807. Floating logic sheet 5, rear right corner lower board.

Thanks for the suggestion. I tweaked it a few days ago. I changed the control voltage from 1.9V to 2.44V, and the PLL was still intermittently unlocked. I ordered the optocouplers, and they were delivered earlier today.

[coromonadalix]

on the eeproms i would put back a new protective tape ... some of them aren't protected at all

[pigrew]

on the eeproms i would put back a new protective tape ... some of them aren't protected at all

Yes, I was worried both about them being erased, bit-rot, and the adhesive foil shorting nets on the board. I pulled the ICs, erased them, flashed newer firmware, and Kapton-taped aluminum foil over the quartz windows.

My progress on replacing the capacitors over the weekend is another story (about 30% of the capacitors I'd consider to have failed). I had been using Kester 331 (organic) flux solder, and was getting the dreaded white residue when trying to clean it with isopropanol. Prior, I had noticed, but couldn't believe, that there was rosin flux left on the board. The cleaning difficulties are due to the mixture of fluxes... it's painful. I almost want to dump the boards into a gallon of heated isopropanol (and then DI water), but I'm worried about water getting into the switches and relays. For now, I've been tediously trying to clean the bottom of the boards. The rosin from the 80s couldn't be doing good things for leakage currents.

[pigrew]

I received my knock-off push-pull plugs (FGG.2B.305.CLAD99Z) from AliExpress, and realized that it's built for much thicker cable (9.2 to 9.9 mm). The sales listing didn't specify which collet it would come with and its photo showed a collet for thinner cable. I'm going to try to buy a thinner collet.

Speaking of which.... what cable to use? My most recent poor-man's idea to to use SuperSpeed USB cable:

Signal	Wire	connector 2B.305 pin
Lo	Black	3
Hi	Red	4
Guard	Drain+shield, isolated from connector housing	1
Lo-sense,High-sense	shielded twisted pair, drain to lo-sense	2,5
(floating)	shielded twisted pair + unshielded pair

My thought is to put high and low next to each other to try to have them have a more similar temperature.

I know the wire insulation may have issues with dielectric absorption (and leakage), but I think that the shielding should be reasonable, and the 20 or 22 AWG red and black should be good for current-carrying. Use of copper wire (in physically small connectors) should reduce thermal voltages.

The LEMO connectors have a "test voltage" of 1.60 kVrms body-to-shell, and suggest a max operating voltage of 1/3 or 583 Vrms. Multiply by sqrt(2) to get a 816 VDC (or so) limit.

The proper Fischer connector has a contact to body test voltage of 2.4 kVDC. Dividing by three, we get 800 V, so about the same.

However, knowing that USB cable is probably specified at max 500 V, I should keep it below that, though it'd likely work at much higher.

(Capacitors and optocouplers have been replaced, boards partially cleaned, will fully clean them once I know everything is working, still waiting for the new input sockets. Also, I noticed that in TEST10 mode, a relay switches for every measurement. I'm guessing that's normal.).

[Mickle T.]

Also, I noticed that in TEST10 mode, a relay switches for every measurement. I'm guessing that's normal.).

Yes, it's normal.

[pigrew]

I was able to replace the optocouplers, but it did not help the clock stability. The 10 Hz measured on PCB5/PL501/32, which is the divided down PLL clock, still oscillates between 9.99745 and 10.00261 Hz (or so). The 60 Hz signal PCB/PL501/30 has about 40 us of cycle-to-cycle variation.

I believe that the mains is just too dirty with lots of switching converters (though it's still possible that PCB5/IC834, a LS132 is weak/failing, I've not probed it directly yet.

However, I think that I'm going to just swap in a crystal oscillator, as others have done. Since the 5.24288 is not a common frequency, my plan is to inject 10 Hz or 50 Hz into where the line frequency normally goes. This is due to the "demodulator drive" signal being used directly from the line zero-cross detector. I don't know why they wouldn't just use the divided down clock to drive the chopper.

My option "1" uses a 10 Hz reference to drive the PLL, and my option "2" uses a 50/60 Hz reference, and also overrides the

Another idea would be to try to filter the input AC signal, perhaps by putting a 1 or 2 uF capacitor in parallel with R803.

What does the "PU3" mean on the schematic? Pull-up? Test pad? 

[pigrew]

Based on stories online, I'm always afraid of vintage Schaffner and Rifa line filters. I ordered a new Schaffner to replace the 1985 "FN 372-2/21". I ordered a "FN 372-2/31" from Arrow (free 2-day shipping from the Netherlands, WTF, how do they make money?). USA retailers don't commonly stock the models with 5mm fuses. This "/31" model code is not listed on the Schaffner datasheet. It ended up being a version where the voltage selection wheel selects between 115, 115, 130, or 130 Vac. It also came with quick-connect jumper wires between the IEC input and the switch contacts. Otherwise, it is functionally equivalent. I installed the old wheel in the new filter. A little bit of soldering was required to disconnect the ground wire from the PCB. I replaced the wire (it was too short after cutting it off of the old filter).

After replacement, I tore up the old filter. It seems to contain poly-film capacitors, so perhaps it wouldn't have failed anytime soon.... I'm not sure.

In general, Schaffner seems to use larger inductances in their lower-current filters (providing better filtering), so I suggest not "upgrading" to a higher-current model.

[pigrew]

The "Brain" PCB is specified to have a NiCd battery that powers SRAM which stores calibration data and configuration (and maybe logged data?) (The manual states that the calibration EEPROM should be used an infrequently as possible, so they cache the calibration in the brain's SRAM). The circuit trickle charges the battery (10 mA, reduced current at higher voltages). Over the years, the NiCd battery leaked acid and damaged the PCB. The original battery (3.6V, 110mAh, Varta) is no longer manufactured. NiMH batteries should not be substituted since they are not compatible with trickle charging (according to Panasonic's documentation).

So, I decided to substitute the battery with a EDLC. I choose the AVX SCMT32F755MRBA0. It is a 7.5 F, 5.5 V unbalanced capacitor (unbalanced implies lower leakage current). It stores less energy than the NiCd battery, but should have a longer service life. AVX reps told me that there shouldn't be any special considerations I need to make in order to use the unbalanced device (other than staying within the voltage rating).

After installing the EDLC, I turned on the meter to charge it. The battery charged up to about 4.48 V, but quickly dropped to 4.34 V after turning off the meter. 11 days later, the battery had discharged to 3.74 V, still high enough to retain the SRAM data. I don't know how long the NiCd battery would retain data, but I'm happy with this modification. A drill hole provided a convenient spot for zip-tieing the capacitor.

Next on the agenda is to replace the input connectors, and maybe continue debugging the clock stability issue.

[RobK_NL]

What does the "PU3" mean on the schematic?

Those "PU" thingies designate connections to IC825.

[borghese]

My option "1" uses a 10 Hz reference to drive the PLL, and my option "2" uses a 50/60 Hz reference, and also overrides the

Have you got any improvements using external 50Hz?
Out of topic, do you have a drawing of the calibration key or maybe one to sell?

[tggzzz]

My option "1" uses a 10 Hz reference to drive the PLL, and my option "2" uses a 50/60 Hz reference, and also overrides the

Have you got any improvements using external 50Hz?
Out of topic, do you have a drawing of the calibration key or maybe one to sell?

I wouldn't expect improvement with an external 50Hz, but I would expect improvement with something tracking the mains frequency (i.e. nearly but not exactly 50Hz).

The user https://www.ebay.co.uk/usr/bielli-int sometimes sells cal keys. I have one, it turns in the lock, but I haven't used it in anger

[pigrew]

My option "1" uses a 10 Hz reference to drive the PLL, and my option "2" uses a 50/60 Hz reference, and also overrides the

Have you got any improvements using external 50Hz?

I've not yet gotten a chance to try external frequency references (and my meter isn't yet stable enough to even see the difference. It's sitting disassembled on a table.).

The PLL output oscillates low and high by a little bit over a period of about a minute, similar to the integration period for 8 1/2 digit mode. I am worried that if the integration "glugs" are slightly longer during part of the conversion and shorter during other parts (in a non-predictable way), the result will be effected. I think it's a balance between removing the 60 Hz effects, and stability of the frequency. My understanding is that most meters just measure the 50/60/400 Hz once upon startup, and then synthesize the 50/60/400 Hz thereafter (instead of using a PLL to track the mains frequency).

My question about the two options is that I don't know if the "demodulator drive" is important to be accurate. I saw it's used to drive the chopper amp at the line frequency, so it shouldn't need to be super accurate? I saw others had directly injected a (roughly) 10.48 or 5.24 MHz clock (the exact frequency XO is not an off-the-shelf component), but it seems easier to just inject 50 or 60 Hz, and let the existing PLL multiply it, accepting a little extra phase noise. This assumes that my measured frequency oscillation is due to the mains zero-crossing circuit and not the PLL itself.

I wouldn't expect improvement with an external 50Hz, but I would expect improvement with something tracking the mains frequency (i.e. nearly but not exactly 50Hz).

It's a balance of the stability of the forcing frequency versus line frequency rejection. My gut feeling is that it's better to have a stable frequency, and accept a small offset from the mains frequency.

Out of topic, do you have a drawing of the calibration key or maybe one to sell?

I do not have a calibration key. I've been running my meter with the front panel removed (and the calibration key disconnected). I found the user bielli-int on eBay posted a photo of a key. I'll attach it here. I also read that you can by the whole lock assembly for $20 or so (IIRC), and it'll come with a key. Search for "(honeywell,aml) 20 (key,lock)" on eBay. I believe that the proper keys are labeled "601" (based on other eevBlog posts).
 

[pigrew]

The next step of my repair is to replace the input connectors, so that I can measure external signals.

I received the LEMO-style sockets, and have replaced the rear connector. I used a dremel-tool to cut an extra flat in the socket, so that the red mark is in the "up" position.

I still have the covers off the unit, so I won't post any exact numbers/noise results. Measured resistances are fairly accurate. Using an old crappy 1.3m long coaxcable, I measured about 300 MOhm input resistance in kohm mode. In true resistance mode, it was hitting the limits.

Unfortunately, the measured voltages seemed way off, about 3000 ppm low. This could be due to dirty PCBs (I need to give them a bath, first desoldering the front/rear input switch, I think everything else is water-safe). Another possibility is aged/damaged components, which means I may need to just recalibrate it. I saw one person reporting a leaky integration capacitor, it may be worth investigating that, too. I think this would mean that the measured voltage would be a function of the integration period selected? Or is there a better way to test the capacitor?

Oh... one other thing... My meter came with a front-panel of a binding-post breakout box. I may try to re-use it. I wish it had come with the box itself... Cry. Needing a fuse is weird; maybe it was a current-shunt box?

[Kosmic]

Oh... one other thing... My meter came with a front-panel of a binding-post breakout box. I may try to re-use it. I wish it had come with the box itself... Cry. Needing a fuse is weird; maybe it was a current-shunt box?

Look like the backpanel of a solartron 7150.

https://holzleitner.com/el/solartron-7150/filter/_dsc1585a.jpg

[Kleinstein]

The voltage reading low by something like 3000 ppm could be due to a problem with the reference: the reference current has an odd fine adjustment via DAC and onto-coupler. The onto-couplers are known to sometimes fail and failing OC could shift the reference a little. So it might be worth checking the OCs (read the logic levels on both sides - they are supposed to be constant anyway). Because of the constant settings it is rather odd to have the OCs here - just jumpers would have done the job as well.

It would need quite some dirt to cause a reading that is 3000 ppm off.

Slight variations in the PLL frequency are not that critical, as the ratio of the positive to negative reference will not change much with time. Still a lot of jitter here can contribute to the overall noise. So the frequency should be stable as good as the simple PLL allows. It sometimes only needs adjusting the trimmer at the VCO.

Having a fixed but stable frequency can result in the low beat frequency to appear in the result. I am not sure how much amplitude will be there.

[borghese]

Unfortunately, the measured voltages seemed way off, about 3000 ppm low.

If the output of IC304 (LM741) is -10V this shift low the zener voltage of several mV; in a corner of the CS there is a label with the value of the DAC; you can check the programmed value by sending the commands with the calibration key in the CAL position:
Output, RS232, ON
CALIBRATE, DUMP

[pigrew]

Out of topic, do you have a drawing of the calibration key or maybe one to sell?

I ordered a new lock from "neat_stuff_from_ohio" on eBay. It was $10 after shipping for me. It looks like he ships to Europe, but perhaps not Slovenia. Shipping rates to you would be around $25 through the USPS (PM me if you need to use me as a proxy to purchase them).... The key that it came with works in the Solartron's calibration keyway. I'm attaching a better photo to this post. It seems to be an Ilco HV61 (made in Canada).

As far as my meter, I've left it on my bench for the last week. I seem to have damaged part of the DAC circuit; the DAC's buffered output is very noisy. I ordered a replacement DAC, and it should arrive by Monday. Expect an update in a week or so.

[Kleinstein]

A noisy output from the DAC would be an unusual defect for the DAC. It might point to a problem with the digital inputs - thus possibly the opto-couplers being right at the edge giving invalid / "digital" signals.

[pigrew]

After replacing the DAC, the signals became more stable. Perhaps I zapped it while trying to probe something... not sure. Regardless, the DAC's output is pretty stable now (34401A shows output fluctuates only on the last digit... so perhaps DMM noise).

Using an oscilloscope on the 10V reference node and the current-reference voltage, shows large, fast spikes, presumably from the chopper amplifier. I guess that could be normal, though I don't like it too much. The attached image is the 10V testpoint.

(Youtube video of oscilloscope and also how I probed it, the 7081's case is completely removed)

The reference uses a BC107 and BCY70 transistors(common base) to buffer the reference voltages. I wonder if they're getting old, causing the spikes to be larger than they should be.... I plan to substitute a pair of BC550 and BC560 transistors, as I can't think of a good way to test the transistors in-circuit. The collector currents are approximately 10 mA, dissipating ~40 mW). (I'm about to order the parts, to be delivered Tuesday, I only have 2n3904 & 2n3906 on hand here, BC550/BC560 should be lower noise).


EDIT: Another idea to stabilize the reference voltages would be to bias the transistors a bit hotter by bodging in a 1k resistor between +10V and GND, and another between GND and -10V. I need to measure the DMM noise before and after, to see if these things make any difference.

EDIT2: Readings are about 250 ppm low.

[Kosmic]

FYI, I'm seeing exactly the same type of noise on the 10V ref of both of my Solartron 7061. One is 2.4v P-P the other 1.9v P-P. This is probably normal.

[Kleinstein]

The Spikes on the reference voltage are not good at all. This should not be normal at all - maybe 1/100 the size might be acceptable though I would prefer < 1/1000 and thus barely visible.

The 2N3904/6 should be OK as a replacement. The transistors are inside a loop and there noise is thus not important. A slightly more powerful replacement (e.g. 2N2222 or similar) replacement might help a little, if the original types are more difficult to get.

The main purpose of the extra transistors should be to keep the power loss away from the OPs and maybe slightly lower impedance to current spikes.
Despite the spikes I somewhat doubt the transistors are broken.

The reason for these spikes could be a problem with the reference circuit, but also some point (e.g. cross conduction of TR201,TR202 in the ADC) causing excessive current spikes. So it might be worth checking of the spikes correspond to some control signals like the +-GLUG of chopper signal.

Another point to check would be the supply the transistors and also the OPs in the reference circuit get - the spikes might come from here too.
Failing R308/R309 (getting too high a value) could be a problem too.

[Kosmic]

Hmmm I will spend some time investigating the 10V ref then.

I'll let you know if I find something.

[Kosmic]

So it look like the noise align perfectly with the Glug drive.

The big spike is the + Glug drive and the small one just after the - Glug drive (see picture). +Glug and -Glug comming in the Integrator look fine thought. So i'm still not sure if it's really a problem or not.


I found that adjusting the main clock has a huge impact on the measurement  noise (not vref noise).

[pigrew]

GLUG+ and GLUG- are never on simultaneously. There's a nice 20us delay between them. The spikes are happening as GLUG+ or GLUG- is turning ON. Perhaps TR203 & TR204 (3N163 4-terminal p-channel e-mode MOSFET) are turning off too slowly. These ground "GLUGS" between pulses.  They have a threshold of between -2 and -5 V (relative to 0V).

TR202 (VN67AK) has thresholds between 0.8 and 2 V (relative to -10 V). So, as -GLUG turns on, there is a time period when both the -10 reference and GND are connected to GLUGS (causing the shoot-through).

I can't help but think that these pulses are damaging the Zener reference. I'll have to study the FET Drive circuit for a while longer. It seems to me that the turn-on-edge is too slow. My oscilloscope shows about 25ns edge time, but I'm not using optimal probing techniques.

EDIT: One "fix" would be to tear out the entire circuit, and replace it with a CMOS analog switch IC, like the ADG1404. I can't think of a less invasive solution at the moment.

On the attached image:

1) -GLUG
2) GLUGS
3) +GLUG
4) -10Vref

I found that adjusting the main clock has a huge impact on noise thought.

You mean tuning the oscillator's capacitor to make the control voltage around 2.5V? Or injecting a lower-noise clock?

[Kleinstein]

I think using a CMOS switch chip instead of the discrete MOSFET circuit is an option. However the ADG1404 might need a level shifter as the control signal is -15 V to -10 V. Especially for a first test a higher on resistance switch might be OK.

A current through the FETs to ground sounds plausible - more like a design weakness than a broken part. A faster control signal could help, but it would not totally eliminate the problem.

[Kosmic]

You mean tuning the oscillator's capacitor to make the control voltage around 2.5V? Or injecting a lower-noise clock?

Yes, just tuning the oscillator's capacitor. But the oscillator is really not stable. I saw in the manual that there is a option to replace the oscillator with a crystal clock. Not sure if the 7081 has the same option. I might try that later on.

[pigrew]

I think using a CMOS switch chip instead of the discrete MOSFET circuit is an option. However the ADG1404 might need a level shifter as the control signal is -15 V to -10 V. Especially for a first test a higher on resistance switch might be OK.

A current through the FETs to ground sounds plausible - more like a design weakness than a broken part. A faster control signal could help, but it would not totally eliminate the problem.

I spent some time trying to design a discrete logic level shifter, but never got anything I was happy with. I believe a good solution would be to buy a logic isolator IC (SI8423BB), and use it to shift up the voltages. There are some other switches that look acceptable and do not require logic level conversion (ADG5409), but they have a worse delay time and higher resistance.

I had been worried that the switch transition time (i.e. propagation delay) is 150ns (nearly a clock cycle), and is strongly temperature dependent, but the delay in the rise and fall are equal, so will cancel each other out. Also I feel better because the Solartron driver circuit has unequal propagation times for rising edge of glug and falling edge of glug, there should be some built-in calibration to fix mismatch.

The mod will cause larger thermal voltages to form, but I hope that it won't hurt the accuracy too much.

What's the proper way to test the modification? I'm planning to go ahead with this mod, but have not convinced myself if it will improve the meter's performance.

Is measuring the "test0" noise good enough? I don't have the equipment and patience to perform temperature coefficient measurements. I may do some linearity testing versus a 34401A.

[Kleinstein]

The ADG1404 CMOS switch also has some down sides: it has quite some parasitic capacitance (higher than the FETs it is replacing). So there would be not cross conduction, but the charging / discharging of switch capacitance - so the effect might be similar. With the ADG1404 it is a 10 V step at some 90 pF or about 40 pF more than with the original FETs - so some 400 pC. With the cross conduction it is some 25 ns with a resistance in the 500 Ohms range (the P-FETs are 250 Ohms and thus rather high resistance). Thus up to 20 mA for 25 ns which is 500 pC - however the cross conduction might be less than the full slope time.
So making sure the switching is fast might be more effective than the CMOS switch.

Some of the current might be normal just because of the capacitance - so some of the spikes might also be normal for the design, though not really desirable. Making the reference part lower impedance might be still an option.


A higher resistance of the CMOS switch would cause some extra gain drift - though not that much. The maybe 1.5 Ohms of the switch will have a TC around 6000 ppm/K, but relative to 100 K this is only 0.1 ppm/K.

[pigrew]

It's been a few days more, and I'm starting to realize that I'm actually chasing a few different improvements.

The first is reference stability. Do the spikes reduce the long term stability of the Zener reference? Maybe. Without a large sample size, the answer is unknowable. However, the spikes can't be good. As Kleinstein has mentioned, the 0V reference is through ~500 ohm resistance of the PFETs, so it isn't too bad.

The second issue is temperature stability. The VN67AK's have ~5 ohm Ron when Vgs=5. Assuming the previously mentioned TC, this may be about 0.4 ppm/K. The ADG1404 has a smaller Ron, so is likely a good change.

I expect noise to be largely unaffected by changing the switches. Using an external clock may be helpful here.

Now, I think the big thing is INL in the very upper part of the range. This depends on how constant the glugs voltage is. The question is: Does the glugs voltage stabalize within the minimum glug width. Using a 10Mohm probe, it looks like it takes 350us to read the reference voltage, and starts about 30 mV off. I used the zoom mode of the scope, so the input amplifier was not saturated. Using the completely wrong FET model (I can't find VN67 spice models, I'm using 2N6660 instead), I see 0.5 mV deviation within the first 40 us or so. I think that something is wrong with my measurement (bad probe HF compensation?). I guess I'll need to compare the 7081's INL with a 3458A to see how good it is without the mod, and then finally with the mod.

I'm not so worried about the capacitace as I am about the switching time. I'll do some bench tests with a 100k load to see how fast switching is with the proper load condition (using an active probe).

Oh, and I finally put together a shorting plug with the LEMO-style connector. High->Low->Guard->Low_source->High_source. I built it with 67/37 solder and copper wire from a UTP Ethernet cable. I didn't cut the copper, I folded it and pushed it into the sockets before soldering.

[Kleinstein]

For the TC due to the Ron of the FETs, one has to take into account that there are also MOSFETs at the signal input. So there will be some compensation and a lower Ron at the reference switches may not be good. I have not checked the Ron values there.

I agree that very short GLUG pulses might be a problem with the way the gate drivers are build. At least this might be a point to check - though much of this would be at the very upper end of the range (e.g. >11 V in the 10 V range). I don't think the small slow settling of the gate voltage would be such a big problem the R_on is not that different from 10  V to 10.03 V.

The spikes are really large, but I still would not expect damage to the zeners. The current does no go that much higher than normal and it is too fast to cause thermal effects. The trouble I see is that the length of the spikes might change with transistor / OP temperature and this way add to the TC. If the spikes change with input voltage this might cause some INL.  After looking at the switches I am no more surprised to see significant spikes, though it is still way more than I have expected. Maybe 500 mV of load transients are kind of normal for a reasonable voltage regulator and a similar stability should be possible with the reference buffer.

The bigger excursion is to the positive side, so from something like having too little load to the reference buffer - this would not be directly from the extra current through the P-channel fets, but more like the gate drive current or maybe some overshoot after a negative spike. Is it possible to resolve the wave-from of the spikes to seen if they go up or down first.

[pigrew]

Is it possible to resolve the wave-from of the spikes to seen if they go up or down first.

I just did a few more oscilloscope captures (sorry I'm using my cell phone camera... it's much faster/easier than floppy disks or GPIB).

I captured traces using a P6205 active probe.

First is the positive reference. There are two different waveforms. One immediately goes up, the other goes down and then up.

The negative reference voltage goes up first.

The next captures are of the "glugs" net. When the +plug is enabled, the spike is evident, and reaches about 1.5 V above Vref. It settles fairly well after ~300ns.

When -glug is enabled, there is a bit of an upwards spike from GND, I guess due to charge injection. It then spikes down to -11.52 V. It may take about 300ns to settle, also. When -glug is disabled, It again bounces down to -11.6 V, and slowly drifts back to GND over ~400ns.

In 3 nines mode, the glugs are shorter. The min positive time is 80.8us @14.2V. The min negative time is 81.8us @-14.2V.  The period is 1.56ms.

In 4 nines (and above), Min positive glug time is 395us, min negative glug time is 394us. The period is 6.22ms.

I'll think about this later, and do some math to get an idea about how these numbers will effect the linearity. For 3 nines mode, the glug duration is definitely short enough to run into INL issues, but due to the reduced accuracy spec, it's likely in spec. For <=4 digits, 395us probably will cause a small amount of INL, based on the oscilloscope captures of the glug waveforms.

[Kleinstein]

The spike for the positive reference going up directly suggests this might be from the gate capacitance - so the positive slope of the gate drive pushes the voltage higher than it is supposed to be. With a rather limited sinking capability (just the resistive dividers) there is not much stopping it from going rather high. A very simple way to get a little improvement might be adding some more load to the reference (e.g. an resistor). One problem here is that making the reference source stiffer might increase spikes on the ground networks or coupling from +ref to -ref.


I don't see a INL problem for the 3 or 4 nines modes. The min on times are still relatively long compared to the settling time. So the reference will be well settled before the next switching comes. Just having the slow switching with some overshoot / ringing is in a first approximation only adding some offset. It would be only if the wave-form changes or two switching spikes interact that it causes INL errors.  One possible effect on switching slope might be from the C210*r210 = 2.2 nF*10K = 22 µs  time constant in the gate drive circuit. But it is still way shorter than the 80 µs min on time.

[Mickle T.]

I don't fully understand, is there are INL problem with this DMM? All 7081 I seen, has a nearly perfect INL in range of 0.1-0.2 ppm /+-10V.

[pigrew]

I don't fully understand, is there are INL problem with this DMM? All 7081 I seen, has a nearly perfect INL in range of 0.1-0.2 ppm /+-10V.

No INL issues discovered. I am investigating spikes on the reference voltage, and guessing that there could be INL issues when overranged (close to 14 V).

In 3 nines mode, the result is constant (pretty much no noise on the result). The INL is better than the resolution of the result, so all is well.

In a very rough measurement, I didn't see any issues >3 nines (within ~20 ppm INL, for my very rough masurement).

I'll now plan to keep the current circuit (risk is more than possible gain), but see if increasing the load to the references helps with the switching noise. As I have the ADG1401 in hand, I'll make some out of circuit measurements of its switching speed.

On a proto-board, the ADG1401's delay is about 150ns. I notice a bit of charge injection along with some ground bouncing (likely caused by not so careful wiring). There is about 0.7 V ringing on the output, perhaps adding a bit of capacitance on the output would improve that (the load is a few pF with 100kohm).

[czgut]

Re input cable:
I would rather avoid using close Hi with Lo:
1. isulation issues: if Your cable has poor iinsulation, You will get leakage between them. It may be meaningfull at 10^4 kOhm measurements.
Iven at 1MOhm level, original Solartron cable lowers reading 0.5   ..1 ppm due to leakage.  Pure cable may  lower readings 5ppm or more..
2. Solartron 7081 is somewhat sensitive to  noise ( noise changes reading  by temporary saturating amplifiers). Therefore good screen around test leads is important whem You will measure Vdc on Low levels, as well as when measuring AC voltages.

Metal plug and  socket will equalize temperatures (to lower thermal EMF) of external/internal cables/connections.

Most od current will be carried by blue (Low I)  and yellow cabel (Hi I  in Ohms Mode)   (1mA @ 0.1 ...10kOhms range)
Input bias Hi current  should be below 50pA, Lo +Guard should be below 120pA.
I would choose good quality, flexible, well screened test cable. (I would not save on cable).
Low thermal EMF Plugs / forks are very important at Low Vdc measurements. I would look for gold plated copper beryllium or something similar. 
Good luck!

[czgut]

Re: PLL to follow line frequency. The circuit used at 7081 has very narrow voltage gap where it works OK. So it is difficult to set it correctly.
But it is worth of doing it, if You need low uncertainty at low voltage   levels (1V, 0.1V).
Without exact tracking of line frequency and integrating Ux exactly N  periods of line voltage, it is very difficult to dump net noise to uV level (influence of AC on DC reading)..

[borghese]

PLL to follow line frequency. The circuit used at 7081 has very narrow voltage gap where it works OK. So it is difficult to set it correctly.
But it is worth of doing it, if You need low uncertainty at low voltage   levels (1V, 0.1V).

Can you explain your method to adjust the PLL or is it the same as described in the manual?

[Mickle T.]

Re input cable:
I would rather avoid using close Hi with Lo:
1. isulation issues: if Your cable has poor iinsulation, You will get leakage between them. It may be meaningfull at 10^4 kOhm measurements.
Iven at 1MOhm level, original Solartron cable lowers reading 0.5   ..1 ppm due to leakage.  Pure cable may  lower readings 5ppm or more..

I think you uses a dirty/failed cable I had a several 7081's and full sets of optional leads for it, including low thermal ones. All leads are well screened, have a PTFE insulation and gives the same measurement results in 1MOhm range. No 0.5...1 ppm due to leakage.

2. Solartron 7081 is somewhat sensitive to  noise ( noise changes reading  by temporary saturating amplifiers). Therefore good screen around test leads is important whem You will measure Vdc on Low levels, as well as when measuring AC voltages.

The 7081 noise sensitivity has nothing to do with the input amplifier saturation. On the old revision of DMM (PCB5 rev. E and earlier) the floating RATIO inputs has a poor FET control levels (TR505, 506, 508, 509 switches), so a fast transient/noise, picked by RATIO inputs, could get to the ADC input. The second problem with old 7081 was a poor GUARD routing, which was corrected in a new DMM revisions.

Without exact tracking of line frequency and integrating Ux exactly N  periods of line voltage, it is very difficult to dump net noise to uV level (influence of AC on DC reading)..

Phase locking to the mains raises more issues than it resolves. Are you uses an ancient auxiliary diesel-generator for DMM powering? A 51.2s integration time and a narrow limits of frequency deviation, specified for the national grid, gives an excellent NMRR in theory and in practice.

[tggzzz]

Phase locking to the mains raises more issues than it resolves. Are you uses an ancient auxiliary diesel-generator for DMM powering? A 51.2s integration time and a narrow limits of frequency deviation, specified for the national grid, gives an excellent NMRR in theory and in practice.

It isn't the same point, but what is the effect of failing to lock to the mains frequency?

I ask because when I first received my 7081 it was noticeably noisy. After tweaking the PLL as per the manual, it became significantly less noisy.

Sorry, I don't have comparative figures, because at that stage I was completely ignorant of the entire topic and was just wildly flailing around.

[Kleinstein]

Not locking to the mains frequency can cause a small very low frequency contribution to be added. The line frequency suppression is rather good due to the long integration time, but not perfect, especially if the line frequency is a little off. Due to the long time even a 0.01 Hz off can be relevant - essentially no more specific suppression for 50 seconds integration.

When locked to mains frequency the suppression would be better (as the frequency is correct) and the additional small signal would be more constant.

The non tweaked PLL could be in a state of not always locked and thus have considerable phase noise. A non locked PLL is usually worse than a locked PLL or a fixed frequency. Also the frequency can be off quite a bit when not locked.

How good the PLL lock will be also depends on the line waveform. The implementation in the Solartron is also not very good, as it only used 10 Hz phase comparison and thus 1/5 or 1/6 of the possible frequency. An analog PLL with a very low frequency loop filter is tricky anyway and can be sensitive to mains hum or similar effects.

So ideally one would have the choice between a fixed frequency and a better PLL. It depends on the signal which one works better.

[pigrew]

As I mentioned a while ago, my unit has significant phase noise on its clock. My current guess is that it is due to the modern use of switching power supplies, causing innumerable spikes which confuse the power line detector circuit, causing the PLL to never really lock. I had initially thought it was due to the optoisolators, but notching changed after replacing them.

I want a way of measuring the effect of the mains/PLL, before trying to tweak things.

What's the best way to measure the goodness of the clock/PLL? Look at the voltage noise of a shorted input (or test0)? Or wind the input cable around a power line a few times to actually inject the mains into the DMM and check that the input is still zero? Because the frequency seems to change on the order of every minute, I think I need to focus on the results of the 8.5 digit mode.

[tggzzz]

I want a way of measuring the effect of the mains/PLL, before trying to tweak things.

I omitted to do that, partly because I didn't have any good way of measuring it.

What's the best way to measure the goodness of the clock/PLL? Look at the voltage noise of a shorted input (or test0)? Or wind the input cable around a power line a few times to actually inject the mains into the DMM and check that the input is still zero? Because the frequency seems to change on the order of every minute, I think I need to focus on the results of the 8.5 digit mode.

Have you considered logging the ratio of the 5.xMHz and 50Hz frequencies with various averaging times? Ideally it should be a constant, but...

[Kleinstein]

For the mains PLL, the first point would be to check if the 50 Hz signal behind the OK is good (low jitter 50 Hz). With poor mains quality it might help to have some low pass filtering at the 50 Hz level (e.g. before the OK).

It might be also worth looking at TP607, the output of the PLL. However this point is sensitive and high impedance and thus testing can disturb the PLL. The shorter and more regular the peaks, the better is the PLL lock. Pin 1 of the 4046 could be an alternative test-point that is not that sensitive and would give pulse of just one polarity.

To see the effect of the frequency there would be two points to test. Once with a stable signal, like the internal zero - this would be slightly sensitive to clock jitter / modulation. The other test would be with an intentional 50 Hz (mains) signal (e.g. 2 V in 10 V range form a small transformer) to see the effect of a wrong frequency on the 50 Hz suppression. It might also work with a 50.0x Hz signal from a separate generator. Probably no need to use the super slow 8 digit mode. The 7 digit mode should be more suitable as one gets more points.

[pigrew]

I made a nice plot showing the correlation of my PLL's instability with the measured voltage. I noticed a strong trend using test0 with 7 nines. I did an 8-element moving average in Excel to process the data. The control voltage (C806neg to TP904) was read by a 34401A in high-impedance mode. This was somewhere around 0.8 ppm pk-pk of the range.

[pigrew]

Probing the demodulator drive (PL501/30, should be the output of the AC zero-crossing detector), shows oscillations in the power line frequency (from 59.97 to 60.02 Hz, or so), so my situation is that the mains here is awful, and/or the PLL filter is too fast.

And to support the view that my mains is awful, I probed the AC line with my frequency counter (using a ProbeMaster 4231 differential probe), and I'm seeing the same sorts of frequency oscillations, so the zero-crossing detector seems OK. There is a wind farm 20 km North of here. I don't know if it could be causing issues.

Injecting a low-phase noise clock seems to be the answer in my neck of the woods. Using a slow enough loop filter would make startup quite slow and annoying.

[Kleinstein]

The mains frequency should not depend on the local generation. The frequency is essentially the same for the whole grid, so likely the US and Canada.
The frequency counter might have the same problem getting a stable trigger from a not so perfect 60 Hz signal. The usual counters are not really good in measuring the mains frequency, as they have problems to get an accurate trigger. Some oscillation of the power line frequency are normal. For some reason I can only find Web pages to show the current European grid frequency, e.g. http://www.mainsfrequency.com/

The PLL filter tends to be rather fast, but this is more like a limitation of the analog implementation. To ensure locking even with drifting VCO the filter also can not be very slow.  The solution could be a digital controlled PLL to allow a fast startup with a long time constant. Some analog tricks are possible too - like a separate mode to get the initial lock.

A stable, but constant frequency is likely the easiest solution. Unless you measure a signal with lots of AC superimposed this should not be a big problem.

[tggzzz]

For some reason I can only find Web pages to show the current European grid frequency, e.g. http://www.mainsfrequency.com/

UK: http://www.gridwatch.templar.co.uk/ and you can download datasets going back to 2009.

[czgut]

Re: influence of AC line noise and line frequency on 7081 DC readings:
On 8 nines (51.2 sec) integration time, number of line periods @ 50Hz is 50 * 51.2 s = 2560.  Assuming use of perfect 50 Hz to control the frequency of 7081 counter generator,  in case of real line frequency =50.01Hz will integrate for 2560.5 periods. This means, that about half of line period vawe will be integrated extra. Depending on phase, influence will be from -87.9ppm to +87.9ppm of line noise voltage  rms Value of line noise present on the input of voltmeter.
For measurement of 1V DC  with 0.1V AC line noise, it will result in 0,1V *87.9ppm/1V)  -8.8 to +8.8 ppm influence. For me it is too much.
Line frequency in Europe is changing mostly from 49.96 to 50.04 (see www.mainsfrequency.com). This is four times more than 0.01Hz deviation taken for calculation above.
 
Re saturation:
When measuring at 0.1V range, 7081 amplifier is set to 100: +0.1V of DC signal + 0.1V ac rms (0.14V peak) on the input  would  give temporary 0.241V * 100 =24.1V causing saturation of 7081 amplifier  (allowable voltage is  +-14V.
0.1V of line AC noise on laboratory table  cable connections is quite often, especially at higher (>10kOm) Vx voltage source resistance.

[Mickle T.]

For measurement of 1V DC  with 0.1V AC line noise, it will result in  -4 to +4 ppm influence. For me it is too much.
...
0.1V of line AC noise on laboratory table  cable connections is quite often, especially at higher (>10kOm) Vx voltage source resistance.

0.1V AC noise in DC measurement is a sign of very bad setup. It's unacceptable in most metrological environments, unless you are using like a femto / picoammeter.

+0.1V of DC signal + 0.1V ac rms (0.14V peak) would  give temporary 0.24V * 100 =24V causing saturation of 7081 amplifier  (allowable voltage is  +-14V.

This does not mean at all, that "Solartron 7081 is somewhat sensitive to  noise". It's just wrong range selection and nothing else.

[Kleinstein]

The very slow 8 digit mode has reasonable AC suppression even if the line frequency does not match. The +-62 ppm calculated by czgut below are already the worst case (1/2 Period off).

However to make use of the additional effect of a matching line frequency, the accuracy needs to be rather high - a fixed frequency would not be good enough and thus the PLL (or something similar) would be needed.

[pigrew]

I did a run with using a "better" clock last night, and it looks slightly cleaner.

My strategy was to still use the Solartron PLL (it's somewhat difficult to synthesize the high frequency), but add a FLL to filter the mains reference. I used a STM32F103 "blue pill" board to generate a 10 MHz reference using its 8 MHz crystal (I disabled the chip's PLLs, and directly used the oscillator to clock the MCU. This is lower jitter than if I had used the STM32's PLL.) I measured the input line frequency (in clock cycles) every second or so, and used a proportional controller to slew the output period towards the measured line frequency. It still takes a 3 minutes or so for the PLL to lock. It took half an hour for the instrument to stabilize (with auto-zero disabled).

The STM32's counters are only 16-bit, so they are not a good choice to use to generate the output signal. Instead, I used the SysTick module which generates a processor exception when the count rolls over using a 24-bit counter.

The mod does not require cutting any traces. Because the STM32 is a 3.3V micro, some level translation is needed. The MCU is 5V tolerant, but the 3.3V logic levels are not acceptable for the 4046 PLL IC. I re-used the existing LS04 to buffer the output. The CD4046BE has a V_IH of 3.5V. The LS04's output is lower than this threshold, but the circuit's pull-ups on those nets increase the V_HIGH above the CD4046's threshold.

The gain of my proportional controller is low enough that the sinusoidal fluctuations in the smoothed (n=8) test0 mode (~0.2 ppm p-p of range) look approximately equal to the rest of the noise. The unfiltered data has a standard deviation of about 3.5 uV (0.35 ppm of range), which is very similar to before the mod.

The 10 Hz output no longer tracks the phase of the mains, but I think that's OK. The AC RMS Converter (PCB6.5) uses the filtered 10 Hz to drive its chopper. The unfiltered mains 50/60Hz ("demodulator drive") is used to drive the input DC chopper. These are no longer in phase with each other.

So, I think I'll keep this mod (I still need to figure out how to properly mount the STM32 board since it doesn't have mounting holes), but the improvement is minimal. Even if the noise is increased or the same, I like this mod since it reduces the correlated/periodic noise.

[pigrew]

I just snapped a photo of the stm32 clock mod. I have not implemented the 50/60 Hz detection, so it only has four wires. Mine is fixed at 60 Hz; Go America! I also checked if the CD4046B was having issues with deadtime causing whiplash. It seems it is fine, or at least the gain in the circuit makes it not a problem. I didn't see any skipped charge injections when it switched from injecting (+) to injecting (-).

But, I discovered something quite odd... The shield PCB between the two floating-ground PCBs is itself floating! It seems that a PTFE washer bushing was used on the standoff isolating it from the guard (standoff->PTFE-bushing->PCB5->metal washer->nut), preventing electrical contact. I guess I should clean it up and make sure it has electrical contact? I assume it has to help with respect to noise to have it not floating.


EDIT: The extra capacitor on the second photo was my attempt to filter the mains's voltage (for the zero-detector).

[pigrew]

It's been a week or two, but I've been busy with other tasks.

The latest work regards the RTC battery. The circuit is designed for a 3.6 V lithium thionyl chloride (LiSOCl2) cell, such as a Tadiran TL-4902. With the 3.6V, the circuit (National MM58174AN) draws about 18 uA, quite high by today's standards. The IC's operating current increases quite substantially with Vdd, so the designers added a series resistor to reduce the voltage to about 3.0 V which reduces the power consumption (though does waste energy in the resistor). With the reduced Vdd, it typically draws about 10 uA.

In my case, I replaced the existing TL-4902 with a Xeno XL-050FAX, which is of similar chemistry. Xeno suggests a depassivation technique for using cells which have been stored for >6 months by draining it with 30 mA for 10 to 30 seconds. I skipped this procedure, as I assume that it is mostly for high-pulse applications and that the passivation layer will slowly be remove through its lifetime.

I had contemplated using a LiMnO2 cell (3.0 V nominal) and get rid of the dropping resistor, but the LiMnO2's energy density is low enough that it would decrease the lifetime vs the LiSOCl2 cell.

(I did a quick run of a 5V reference, and noticed sub-ppm level steps during the auto-zero cycles. These steps do not happen when the input is zero volts. This will require further debugging, and inspection to see if some "charge-injection reduction" resistors were added to my auto-zero circuit or not. I pulled the integration capacitor from the board and tested it for leakage. The LC102 tester showed zero leakage at 100 V. I'll reinstall it (I have some replacements in stock in case I melt the capacitor or something. I may order some of the teflon standoffs to reduce PCB leakage, too, as Mickle has demonstrated on the input). Grounding the guard PCB did not significantly change the measured noise.)

(I ordered a replacement display that I was going to bodge in, but it turned out to be too deep, and doesn't fit between the blue filter and the PCB. I think I'll just order the correct part from eBay.)

[Kleinstein]

AFAIK the steps during AZ cycles with a non zero input voltage are a kind of bug. Mickle did some investigations on this, and may even have a work around / fix. AFAIK this is some settling (possibly DA related)  problem when switching to Zero.

[pigrew]

AFAIK the steps during AZ cycles with a non zero input voltage are a kind of bug. Mickle did some investigations on this, and may even have a work around / fix. AFAIK this is some settling (possibly DA related)  problem when switching to Zero.

Kleinstein,

I've burnt his modified floating ROM which disables some input relays and extends the delay after switching in the zero... I didn't mesure with the stock firmware, so I don't know what difference it may have made.

[Kleinstein]

The rather slow auto zero cycle of the Solartron DMM is a principle problem and thus a limitation of this DMM. Due to the rather slow conversions the AZ cycle is long (like minutes). Thus low frequency noise will come in even though they have an AZ at the integrator input. However there are other noise sources too, that can can include some 1/f noise: the amplifier for the +- reference, current noise (e.g. leakage) and thermal fluctuations for the resistors. There is a reason they used those super stable coupled resistors for the +- reference. A 1 ppm change in the resistor ratio causes about a 15 µV change in ADC reading. So to get a stable 8 digit reading those resistors need to be stable (over an AZ cycle) to something like 0.01 ppm.  If the AZ mode works with a short it indicates that this part is actually working.

Another source of trouble with AZ is dielectric absorption (DA): it can make capacitors to settle really slow, over several second and even minutes. The integration capacitor is relatively large (slow modulation) and thus DA effects are larger than with more modern ADCs with faster modulation. The ADC is made in a way that the average voltage at the integration cap changes with applied voltage. So a step in input voltage will follow a slow relaxation. More delay can help here, but waiting for a slow decay has a limited effect.

A possible side effect of the zero measurement is, that the resistor for the input current to the ADC will cool down a little and need some time to get back to steady state temperature when measuring a stable reference. This would also contribute to INL and some slow settling on switching the input voltage.  Different from the DA effect (which should be about linear) this effect would follow a 3rd power law (square law for heating and one more factor from the resulting gain error to absolute error). One would not expect thermal settling after a step from positive to negative voltage.

[pigrew]

It doesn't matter for the accuracy of the meter, but I finally bought and installed a new VFD! For the first time since my meter was shipped to me, I have it fully assembled with the front panel working!

The replacement VFD (from eBay) has a different shape (flat on the front), so it didn't mechanically fit as the original one did with ~4mm rubber bumpers between it and the PCB. The old VFD was damaged (broken neck) in shipping due to a small mechanical clearance around the neck. With the new VFD placed further back (I used 1mm rubber sheets as a standoff), there is now more clearance around the neck. Unfortunately, the VFD is set back slightly further so the display is only 98% as nice. The rubber separators are a good idea to reduce vibration-induced mechanical fatigue of the leads.

Now, with a fully closed case, I will do a bit of calibration/adjustment. I may even throw the whole unit into a thermal chamber and test at {15, 25, 35C} with various reference bias current values set to see how accurate the factory bias selection was (though this will wear the calibration EEPROM, maybe I should peek and poke in the debugging mode?)

[HPIB]

I am going to replace batteries inside my 7071 and 7081 meters. Could someone verify my thoughts that there are 2 batteries:

1) Lithium cell 3.6V (on the bottom pcb on earthy side)
2) Ni-Cd battery 3.6V (on the top pcb on earthy side)

Am I right that Lithium cell is holding calibration data and if removed, they are lost and unit must be calibrated again?
Ni-Cd battery is for RAM backup and can be removed/replaced easily? I read that someone replaced Ni-Cd with supercap. May I ask for details? I am thinking of installing batteries inside some batt. holders (not directly soldered to pcb) to prevent leaking on boards in future.

Any tips and tricks how to change batteries will be much appreciated ! 

Thanks

[pigrew]

I am going to replace batteries inside my 7071 and 7081 meters. Could someone verify my thoughts that there are 2 batteries:

1) Lithium cell 3.6V (on the bottom pcb on earthy side)
2) Ni-Cd battery 3.6V (on the top pcb on earthy side)

Am I right that Lithium cell is holding calibration data and if removed, they are lost and unit must be calibrated again?
Ni-Cd battery is for RAM backup and can be removed/replaced easily? I read that someone replaced Ni-Cd with supercap. May I ask for details? I am thinking of installing batteries inside some batt. holders (not directly soldered to pcb) to prevent leaking on boards in future.

Any tips and tricks how to change batteries will be much appreciated ! 

Thanks

The battery #1 is only for the RTC (to keep time and date). It is not rechargable, and yes, replace it with a lithium cell. I used a Xeno XL-050AX, but Tadiran TL-4902 is the name brand. It is 1/2 AA size, Li SOCl2.

Battery #2 does not store calibration. Calibration is stored in a EAROM, IC804. Battery 2 stores the settings (like if DCV is active in 100V range) and recorded data. As the NiCd batteries all leaked over the years and I want to avoid that again, I replaced mine with a supercapacitor.

[tggzzz]

I'll confirm that information about the batteries.

I'll add that the calibration constants are stored in the floating logic. You can dump them via "RS232" on the rear panel, but it is deliberately difficult.

[HPIB]

4 pigrew and others

so, there is no any cell / battery inside 7071/81 which holds calibration data? I am asking to be sure - if I desolder both batteries to clean pcb boards, then install new ones, will everything (calibration) be OK and not lost / erased?

I read the whole service manual, but there is only little information about batteries in them. I do not have personal experience with EAROM type memory.

Thank you.

[picburner]

EAROM was the forerunner of modern eeproms, the principle of operation is the same.
The calibration data of the instrument, as others have told you, are contained in this memory.
Removing the batteries you do not lose the intrument calibration.

[HPIB]

is it possible to set brightness of VFD without any soldering modification to the meters ? I know there is an option to set the display OFF, but I would like to lower brightness only - for day/night conditions and to extend their lifespan (because they are hard to find spare parts nowadays).

[picburner]

There is no command or adjustment to decrease the brightness.
You need to do a hardware modify to decrease the brightness by slightly lowering the 40V voltage.

I found a FG209M VFD display from a pinball spares vendor, it looks like this display was used a lot on these old games.

[branadic]

Sorry to highjack this thread, but as it is related to a repair I think it is the right place.
A 7081 showed up today on my desk. Unfortunately it is missing all the feets, so with some pictures provided by Marco Reps and the dirt marks on the unit I designed some replacement feets for it. But before I print them I wanted to ask if someone can check the design files. Attached are the files for both sides, thus a mirrored version is included. Thanks.

-branadic-

[perdrix]

Just in case you aren't aware:

<https://groups.io/g/Solartron_Schlumberger_Equipment/files/Solartron%207071%20and%207081>

Mickle's change log makes really good reading.

Dave

[perdrix]

Replacement VFDs on eBay - what!   Please would you provide a link...

Thanks
David

[branadic]

First inspection revealed, beside missing feets, completely dead battery and leaking NiMh accu as well as dirt from smoking.
Could neutralize and rescue the traces, pads of the sockets, but lost two pads and the relating via on one of the positive accu connections. However, I could rescue the pads too and glued them back in place with UHU endfest, which is currently curing.
Replacement battery and rechargeable battery are already ordered and will hopefully show up soon. Meanwhile I will go on to clean the boards from smoking dirt and neutralize the smell of it.

-branadic-

[pigrew]

Replacement VFDs on eBay - what!   Please would you provide a link...

Seem no longer. The item I got was "Noritake Itron FG209C2 M2 5CB Japan 7" x 1" VFD Vacuum Fluorescent Display New"

The seller has another item that looks pretty similar (maybe)?

https://www.ebay.com/itm/IEE-05464ASSY-33379-01A-VFD-Vacuum-Fluorescent-Display-05464ASSY33378/283434262918

The FG209M2 might also work. I remember it being a minor mechanical difference.

I seriously considered replacing the VFD with segmented LED, but I couldn't find any that were physically compatible. It was around US$60.

First inspection revealed, beside missing feets, completely dead battery and leaking NiMh accu as well as dirt from smoking.
Could neutralize and rescue the traces, pads of the sockets, but lost two pads and the relating via on one of the positive accu connections. However, I could rescue the pads too and glued them back in place with UHU endfest, which is currently curing.
Replacement battery and accu are already ordered and will hopefully show up soon. Meanwhile I will go on to clean the boards from smoking dirt and neutralize the smell of it.

-branadic-

I like what I did replacing the NiMH battery with a supercap. I'm assuming supercaps won't ever leak electrolyte, and the circuit required no changes. I guess my board wasn't that bad... I didn't do any sort of electrolyte neutralization. I just cleaned it a bit with water and alcohol.

[pigrew]

Sorry to highjack this thread, but as it is related to a repair I think it is the right place.
A 7081 showed up today on my desk. Unfortunately it is missing all the feets, so with some pictures provided by Marco Reps and the dirt marks on the unit I designed some replacement feets for it. But before I print them I wanted to ask if someone can check the design files. Attached are the files for both sides, thus a mirrored version is included. Thanks.

-branadic-

I think it should work, but personally I might use a solid shell (with 20% to 30% infill?) for added strength. I don't think it'd increase the material usage by so much.

I measure your model at 21.7mm tall. My feet are 19mm tall. The other dimensions are a little bit off from mine, too. The only major functional difference is a spot to insert the wire bail.

I'm attaching some quick measurements of a foot. But, it's pretty much all cosmetic changes, I expect your foot model would be fine.

The corner radius is about 1.8mm... hard to measure.

[branadic]

Thanks for the dimensions. (Un)fortunately my colleague was fast and printed them last night already, but they do fit perfectly.
Replacement batteries are on their way. Need to find a good way of cleaning the boards from dirt and dust next and will disassemble the whole unit, to wash the frame, to get rid of the smell.

-branadic-

[branadic]

Disassembled the whole unit yesterday and washed the frame in the shower. It is much brighter now. Also washed both digital boards with lot of IPA. Gave the analog boards at least a partial cleaning with Q-tips and IPA. I have the feeling the smell is already a bit less, but still present.
Is there any recommendation on how to remove the smell from rubber? Washing and spraying overnight with Febreeze didn't help yet. I don't think that putting it into the freezer would do anything.

-branadic-

[branadic]

Battery arrived and is already soldered in place. Rechargeable battery is still on its way and will hopefully arrive tomorrow.
Cable clips were removed from old glue and reinstalled with double sided tape. Unit step by step returns into something of value.

-branadic-

[branadic]

Rechargeable battery didn't arrive, but I found two 0.47F / 5.4V supercaps, that I installed instead. Handle rubber had a nice cooking in water with vinegar, the old cigarette smell is now gone 
Meter is now warming up, then we can give it a first measuring and see where we are.
I started designing a new front panel for binding posts. Unfortunately LT binding post don't fit, so plan b is to use Pomona 3770 like Marco Reps instead. Hopefully I can finish that design this weekend. Other than Marco I want to keep the calibration lock at the front.
A lil bit of a longer lasting project is the design of a new reference board like MickleT. did, but also different: LTZ1000CH, TDP resistor network for temperature setting, ...
And I will start analysing the schematics to see, if we can get noise down with modern opamps.

-branadic-

[Kleinstein]

There was an older thread on the 7081 meter. AFAIR the meter is relatively noisy and there was not much success reducing the noise very much. From a short look at the schematics, there may be a few point where a more modern OP could help and reduce the noise, but there are several points that can contribute. A difficult part is the PLL for the clock. Not really sure it is worth replacing the reference. A selected 1N829 is not that bad.

[branadic]

Well, I can't agree that the meter is relatively noisy, attached first results with the meter, measuring my LTZ1000#1 reference. Not to bad for 9x7, only about +/-2 counts, but need to check 9x8 as well. And I need an EPROM with MickleT.'s bugfix for the drift correction.

-branadic-

[Kleinstein]

The noise level is about where it should be to call it 7 nines. However this is already at a relatively low speed. It is impressive that the noise is that low even with a 10 V voltage, and not only with a short. So the 1N829 reference is really low noise. At least for 7 digits no real need for a lower noise reference.

Maybe not right to call it high noise, more accurate slow to get low noise. Chances are one will see the limitations in the 8 nines mode, as there are a few drift / low frequency noise components that are not compensated by a AZ mode, other than the very slow drift compensation mode with it's own problems. After all the meter is more like a 7 digit meter with an extra slow mode to go a little beyond 7.

The stability without the drift compensation is impressive.  Before the drift compensation the readings are more comparable to the non AZ mode in conventional DMMs. It has the advantage of continuous sampling the input and thus minimal noise-bandwidth for the input signal. Quite often the external voltage to measure is more noisy than the ADCs or reference. In the lower ranges the input amplifier also can be more noisy than the ADC or reference. So a low noise BW be a plus. Some meters have an extra analog filter for this purpose to reduce the BW, but this adds to the settling.

[branadic]

9x7 doesn't look to bad either, with drift off and no filtering active.

Edit: My unit has serial number 475, contains 2764 EPROM and firmware is marked DC

Code: [Select]

Vdc calibration constants
-17.4045562E-06
 164.748121E-03
-3.09944152E-06
 1.64744222E+00
-1.07288360E-06
 16.4753368E+00
-2.98023223E-06
 164.631444E+00
-1.13248825E-06
 1.64640850E+03
Vac calibration constants
 327.509400E-03
 3.27633542E+00
 32.6723201E+00
 326.904304E+00
 3.27080905E+03
kOhm calibration constants
-17.4045562E-06
 166.011106E-03
-3.09944152E-06
 1.66011920E+00
-1.07288360E-06
 16.6019517E+00
-3.09944152E-06
 166.040122E+00
-1.07288360E-06
 1.66032950E+03
Top Ohms range calibration constants
-1.07288360E-06
 9.90003223E+03
 602.343082E-03
Ratio terminals calibration constant
 16.4756781E+00
Zener current token value
103
-branadic-

[Kleinstein]

The noise looks in deed relative good. The very low frequency noise parts is kind of normal without the drift correction.
Even than there is the question how much is from the ADC and what is due to the noise of the 2 references involved. One known contribution is 2.5 times the noise of one of the OP07 in the reference amplification. Beside the reference this could be a significant part for the slow part.
The drift correction part would remove some of the very low frequency noise, but also add some noise from the steps.

As far as I have understood the ADC, the 9x8 mode should be the same as averaging over readings int the 9x7 mode. The integration in continuous anyway and the timing of the comparator essentially ready the time for the zero crossing. So adjacent readings just add up with longer measurements.  The only difference could be with the drift correction, that would likely be slower and lower noise in the 9x8 mode.

[branadic]

Thanks to someone close to me and the amazing work of MickleT. I will have the drift bug fixed during this week. So let me say thank you here.
And for everyone who doesn't know, here is the package that includes the ROM files with the bug fix for IC803:

http://www.ko4bb.com/manuals/2.205.132.12/Solartron_7081_Documentation_pack_-_Mickle.T.zip

-branadic-

[branadic]

Attached is an INL measurement of the 7081 in 9x7 mode and auto zero off, with 20 values averaged.

-branadic-

[Kleinstein]

The INL looks really good. It this still without drift correction or with the old drift correction ?

20 values averaged is quite slow, though using 9x7 mode only. AFAIR 20 readings in 7 digit mode would be about the same time as 1-2 readings in 8 digit mode. So probably without drift correction as this would be to noisy in 7 digit mode.

Depending on what type of noise dominates one could get a little less noise if one does not use the simple arithmetic mean, but with a little different weights. Maybe something 1/2 the weight to the first and last reading.  This would effectively average over the first and last 2 readings for the comparator timing. This is a little like frequency calculation from multi time stamp frequency measurements. The difference may not be very large, but also not very much effort.

[branadic]

Drift compensation was turned off. One reading in 9x7 equals 3.2s, so the average of 20 readings equals almost one reading in 9x8 (51.2s).
Will repeat that measurement with drift compensation on once the "new" EPROMs have arrived and been installed.

-branadic-

[branadic]

Some minor progress on another part of the meter. I'm not a fan of those low thermal Fischer connectors. Inspired by Marco Reps I designed a new front panel for Pomona binding posts, but wanted to keep the calibration key switch.
If someone is interested I can share the CAD files as STEP. Will have them printed soon and yes, they do fit all 70x1 meters.

-branadic-

[branadic]

Thanks to a helping electronics community member nearby I got a set of 2764 EPROMs with the latest firmware version DD and the bugfix for ic803, that was developed by MickleT. I measured multiple hours with drift correction turned on and off (9x7). The jumps after the meter has warmed up are much smaller now.
Mickle states: "It is almost impossible to get rid of these spikes and random level shifts due to a DA effect and ADC noise. The main goal of patch-fix was reducing a zero offset, introduced by drift correction and depending on the magnitude and sign of the input voltage of the voltmeter. This is done simply by adding a fixed delay after a MUX switching while drift correction."
So this is almost the best I can achieve on this meter.
Black low thermal binding posts with black, red and blue inserts are on their way and will arrive soon, so I can finallize the CAD files for them and the CAD drawing for the front panel, while the Pomona version is intended for the lower grade 7061/7071.

-branadic-

[Kosmic]

Some minor progress on another part of the meter. I'm not a fan of those low thermal Fischer connectors. Inspired by Marco Reps I designed a new front panel for Pomona binding posts, but wanted to keep the calibration key switch.
If someone is interested I can share the CAD files as STEP. Will have them printed soon and yes, they do fit all 70x1 meters.

-branadic-

I would be interested in the files.

I was planning to do this operation on my Solartron 7061 and 7081. Fischer connectors are ridiculously expensive and I found some good quality binding posts relatively cheap.

On my side I was planning to simply print the part in PLA. Are you planning something else ? aluminium like Marco ?

[Kleinstein]

The jumps from the drift correction are quite visible. It meter running in 9x7 or 9x8 mode ? Averaging 16 reading 9x7 would be the same for the normal readings, but the drift correction is likely still different, with less noise in the 9x8 mode.

The regular outliers to the negative side look a little strange. So the first reading after the drift correction may have sometimes problems.

For the drift-correction jumps it may be interesting to watch a step in the real signal: some 30 minutes at a higher voltage like 10 V (the exact value and stability does not matter) and than jump to a short, and watch settling for the next 20 -30 minutes. During the zero reading phase there can be settling from DA and thus jumps in the drift correction and also some "drift".

[branadic]

Attached is the STL-file.
I will use a DLP printer, with a ceramic filled resin to print the panel. But it's up to you how to realize it. It can be cnc machined from a block of aluminium, but you can also try FDM.
Unfortunately the STEP file is to large to upload it here. So STEP file only up on request, to send it per mail for your own modifications on it.

Meter was running in 9x7, but currently measures in 9x8 for comparison. If the meter really suffers from DA, it would be interesting to replace the integrator caps by PTFE ones, though we've already seen, that DA is not the main issue on R6581, so meanwhile I'm a bit sceptical about DA statements. On the other hand some hermetically sealed PTFE caps would fit the hermetically sealed resistors inside S7081 optically.

-branadic-

[picburner]

I got a set of 2764 EPROMs with the latest firmware version DD and the bugfix for ic803, that was developed by MickleT.

Which version of MickleT's ic803 patch did you install, 1000mS or 3200mS?

[branadic]

I have patch 1.1 installed, thus 3200ms.

-branadic-

[TiN]

Unfortunately the STEP file is to large to upload it here.

You could always share it on standalone hosting and post a link.

Great work on S7081. Little meter that can, unlike Advantest 

[picburner]

My 7081 is very old and still used the tms2564 so I thought of this solution that fits on sk404, sk405 and IC416.
The palce16v8 replaces the 74ls138 also.

[branadic]

Great work on S7081. Little meter that can, unlike Advantest 

Thanks.

My 7081 is very old and still used the tms2564 so I thought of this solution that fits on sk404, sk405 and IC416.
The palce16v8 replaces the 74ls138 also.

Why don't you keep the original parts? Is there any reason to not buy NOS parts and get them programmed?

9x8 measurement finished. Can't finally conclude if drift correction is doing any good to the meter or if I prefer it turned off. Unfortunately drift correction isn't explained in detail, neither in the user manual nor in the operation/service manual, so I haven't got the point yet, what drift it should actually correct for. Can somebody elaborate on that?

-branadic-

[Kleinstein]

AFAIK the drift correction does a zero measurement, a little like in the AZ mode / manual Zero in a meter like the Keithley 2000/2002. The ADC measures a zero reading to correct for drift AFAIK this does not include the input amplifier, as switching is done behind the amplifier. So this is for correction of  ADC zero drift.

The integrator in the ADC used an AZ OP, so essentially drift there. However there can be drift in the reference amplification part. It the balance in the +10 V to -10 V reference changes, this will effectively be zero point dirft for the ADC. There are mainly 2 parts: the double resistor (R305 a/b) and the OP IC 306 (OP07).  An 1 ppm dirft in the R305a/b matching would result in an offset of some 16 µV. So it does not need that much drift there.

[Kosmic]

Attached is the STL-file.
I will use a DLP printer, with a ceramic filled resin to print the panel. But it's up to you how to realize it. It can be cnc machined from a block of aluminium, but you can also try FDM.
Unfortunately the STEP file is to large to upload it here. So STEP file only up on request, to send it per mail for your own modifications on it.

Thank you, much appreciated!

[branadic]

Today I received black LT binding posts. Both versions of the front panel will be printed soon, painted black, while the labeling will be filled with white color.

-branadic-

[branadic]

Some minor progress, but not yet finished.

-branadic-

[meandeev]

Hello branadic,

which LT posts did you use?

[branadic]

Low Thermal Model 2758 also available at wekomm for the S7081 and Pomona 3770 + 3760 (blue, guard only) for S7061.

-branadic-

[Kosmic]

I did a quick print in PLA to test the new front panel. Was done really quickly, so this is not the final quality (and color ...). I will fix the horizontal lines and labels in my next version.

Look like my binding posts are similar to LT post. I had to increase the size of the hole though since the screw part on mine is bigger. Overall i'm pretty happy. Thanks again Branadic!

[tggzzz]

I did a quick print in PLA to test the new front panel. Was done really quickly, so this is not the final quality (and color ...).

I presume you have a daughter, and that you are trying to help her realise that your toys and experience might be valuable to her

I must admit, for something as precious as a 7081, once I was satisfied with the design I'd probably want to get this professionally made. Nylon isn't a bad material, being slightly flexible, but a black SLA would be good too.

Are the PLA/ABS materials hygroscopic, or would gaps between layers trap gunk over the years? If so they wouldn't be good w.r.t. high impedance or high voltage.

[Kosmic]

I did a quick print in PLA to test the new front panel. Was done really quickly, so this is not the final quality (and color ...).

I presume you have a daughter, and that you are trying to help her realise that your toys and experience might be valuable to her

Yep got 2 daughters 

I must admit, for something as precious as a 7081, once I was satisfied with the design I'd probably want to get this professionally made. Nylon isn't a bad material, being slightly flexible, but a black SLA would be good too.

Are the PLA/ABS materials hygroscopic, or would gaps between layers trap gunk over the years? If so they wouldn't be good w.r.t. high impedance or high voltage.

My plan is to finalise the form factor and then try different materials (PETG, ABS, PLA). I'm also planning to use paint or epoxy to seal the material. I have a high resistance meter so I should be able to do some interesting tests.

[branadic]

For some reason my unit started getting Alzheimer, throwing out "NVM Fail". The maintenance manual mentiones to replace the ER3400 by a new one: "NVM FAIL - This could indicate a failure of the NVM circuitry, or of IC804. A spare NVM would prove useful here." which I did, but that didn't change something. I wonder if someone ever had a similar problem and can share experience. I guess it's time to check some power rails.

-branadic-

[branadic]

So I think I'm a step further. Turns out replacing the NVRAM requires full calibration. Actually it's a full adjustment instead. Unfortunately, I don't have any AC calibrator or signal source to complete the calibration, which is essential to at least save the calibration constants to the NVRAM.
What's even more weird is, that there is a possibility to dump the calibration constants, which I did in the past, but there seems to be no way of playing them back to the device. I wonder what this CALIBRATE, DUMP option is then for, if you need to fully adjust it in any case. So unless there is no hidden "play your dumped calibration constant back to the unit" command, I guess I need someone helping me out to perform the whole calibration process at once

-branadic-

[perdrix]

If you happen to be in the UK with your meter, I have a Datron 4808 calibrator

PS does anyone have a spare earthy logic board for one of these - I have a bad one I have totally failed to fix

David

[MiDi]

The NVRAM saves the cal constants twice, if only one version is faulty, you can rewrite it by command CALIBRATE, REFRESH.
I guess you know that and the ER3400 had no correct version any more?
You have read the cal constants over the interface, is this a correct cal before the unit got Alzheimer?

If you can read the NVRAM with external programmer, it may be possible to reconstruct a correct cal and write it to a new NVRAM/EEPROM.
Maybe not that easy to find a compatible chip that is supported by programmers today or even make a custom config file for those.

You could ask Adrian, he should be able to calibrate/adjust this units.

[branadic]

@ David,

I'm sailing under the german flag

@ MiDi

unfortunately I only have a TL866 II, which seems to not support this ER3400 chippy
Already in contact with Adrian, but thanks for the hint anyway.

-branadic-

[picburner]

No commercial programmer, not even my Data I/O 3980, is able to program an EAROM ER3400.
Look what I had to do to be able to program it.

[branadic]

Just an update.
Replacing the NVR requires a full adjustment. Thankfully Dr. Frank help with that. Meter is back since yesterday. However, it turned out at Frank that NVR issue had another root cause, the electrolytic cap for the programming voltage was bad. I had checked that rail, ripple and the cap before, but couldn't find an issue there. Frank the "Prüfgeräteelektromechaniker" however spotted the problem, fixed it by replacing the cap and completely adjusted the meter. Thanks again 

I found the ADC zero tc mod by MickleT. but couldn't find any description on it, even on radiokot.ru. Does someone have a link, where this mod is described in detail?

-branadic-

[Mickle T.]

It's a simple correction (balancing) of R305 TC with copper wire.

[Dr. Frank]

Well, I'm even a 1st EloPrfGerMech (w/o electro) from the German AF  . All the stuff I repaired and calibrated in 1980.. 1982, was all electric, though..

The EARAM needs a -30V programming voltage, which is generated by a charge pump on A5, Floating Logic board. C804 was a 47µF, 50V electrolytic made by Philips, which had 3nF left only, so not delivering sufficient current anymore for the erase/programming cycle. I assume, that this killed the content of the old chip, not the chip itself.
Owners should check / replace this capacitor with 100µF/50V (which I have seen in other units).

In the service manual, chapter 8, Monitor, Calibration and Self Test, there are hints how to access (read) the EARAM Nibble by Nibble, using the MONITOR via RS232, and this should be done for the whole 1024 Nibbles, (2 pages of 256 byte of cal data) to copy the calibration constants plus the parity checksum.
There seems to be the facility to write back this low level storage information also, as there is no GP-IB command to write back the real numbers to EARAM.. similar to the 3458A, where you can only dump the calibration constants, but not write anything back from outside.

The manual is not precise at all how to do this exactly, and I did not try any more.. I had a lot of trouble with the interface programming - Handshake / Arming and Triggering methods seems to be  implemented quite unstably, compared to hp instruments.

Anyhow, a quite nice instrument for its time, and still very stable, electrically..

There had been several of these in our stock @ RWTH Aachen 2. Phys. Institute, and my prof. initially requested me to overhaul and use these .. but I was very happy to instead purchase the new hp3458A in 1989.. due to being a bit faster ... 

Frank

[meandeev]

It's a simple correction (balancing) of R305 TC with copper wire.

Hi Mickle T.,
do you mean this way?

[Mickle T.]

Yes, it is.

[meandeev]

I made the same test and have nearly the same absolute drift value, but in the opposite direction - so should I put the correction wire in the upper part of R305?

[meandeev]

I made some tests to decrease the TC (in the upper part of R305a):
-started with 63cm copper wire (diameter 0,20mm): better, but not good
-then with 130cm copper wire (diameter 0,20mm): too much, TC switched to the opposite sign
-last with 100cm copper wire (diameter 0,20mm): I´m satisfied with that

[branadic]

Nice that it worked for you too.
I've checked some old pictures I took and found that this resistor arrangement looks different on my unit.

-branadic-

[meandeev]

looks like a Vishay hermetic resistor. It should be a double 10k/10k, isn´t it?  So you can bend one pin  - and wind some wire around the resistor too. Maybe you should use an thinner wire, so it can be shorter because the resistor has not so much space.

[Mickle T.]

It's a Vishay 312832 - custom made divider.

[branadic]

I was asked to share the CAD drawings as a STP file, so here you find the packages for both, the Pomonoa and LT Model 2758 version, including the front panel as STL and STP, but also the complete assembly with the binding posts in a STP format.

https://www.eevblog.com/forum/repair/repair-of-solartron-7081-sn718/msg3058252/#msg3058252

-branadic-

[rigrunner]

Branadic's work realised in Formlabs Tough 2000 resin.

 

[branadic]

Realized there never was an image of the final units, here is the 7061 with Pomona 3770, that I recently sold and an image of Solatron 7081 with Low Thermal 2758.

-branadic-

[Kosmic]

FYI, I reproduced the feet of my 7081 (to be used on a 7061). Files are in the feet thread here: https://www.eevblog.com/forum/testgear/replacement-knobs-feet-and-fittings-for-test-equipment/msg5173905/#msg5173905