Author Topic: Repair of Solartron 7081 SN#718  (Read 2460 times)

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Offline czgut

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Re: Repair of Solartron 7081 SN#718
« Reply #50 on: July 22, 2018, 05:22:59 pm »
Re: influence of AC line noise and line frequency on 7081 DC readings:
On 8 nines (51.2 sec) integration time, number of line periods @ 50Hz is 50 * 51.2 s = 2560.  Assuming use of perfect 50 Hz to control the frequency of 7081 counter generator,  in case of real line frequency =50.01Hz will integrate for 2560.5 periods. This means, that about half of line period vawe will be integrated extra. Depending on phase, influence will be from -87.9ppm to +87.9ppm of line noise voltage  rms Value of line noise present on the input of voltmeter.
For measurement of 1V DC  with 0.1V AC line noise, it will result in 0,1V *87.9ppm/1V)  -8.8 to +8.8 ppm influence. For me it is too much.
Line frequency in Europe is changing mostly from 49.96 to 50.04 (see www.mainsfrequency.com). This is four times more than 0.01Hz deviation taken for calculation above.
 
Re saturation:
When measuring at 0.1V range, 7081 amplifier is set to 100: +0.1V of DC signal + 0.1V ac rms (0.14V peak) on the input  would  give temporary 0.241V * 100 =24.1V causing saturation of 7081 amplifier  (allowable voltage is  +-14V.
0.1V of line AC noise on laboratory table  cable connections is quite often, especially at higher (>10kOm) Vx voltage source resistance.
« Last Edit: July 23, 2018, 12:22:00 am by czgut »
 

Offline Mickle T.

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Re: Repair of Solartron 7081 SN#718
« Reply #51 on: July 22, 2018, 06:02:09 pm »
For measurement of 1V DC  with 0.1V AC line noise, it will result in  -4 to +4 ppm influence. For me it is too much.
...
0.1V of line AC noise on laboratory table  cable connections is quite often, especially at higher (>10kOm) Vx voltage source resistance.
0.1V AC noise in DC measurement is a sign of very bad setup. It's unacceptable in most metrological environments, unless you are using like a femto / picoammeter.

+0.1V of DC signal + 0.1V ac rms (0.14V peak) would  give temporary 0.24V * 100 =24V causing saturation of 7081 amplifier  (allowable voltage is  +-14V.
This does not mean at all, that "Solartron 7081 is somewhat sensitive to  noise". It's just wrong range selection and nothing else.
 

Offline Kleinstein

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Re: Repair of Solartron 7081 SN#718
« Reply #52 on: July 22, 2018, 06:54:25 pm »
The very slow 8 digit mode has reasonable AC suppression even if the line frequency does not match. The +-62 ppm calculated by czgut below are already the worst case (1/2 Period off).

However to make use of the additional effect of a matching line frequency, the accuracy needs to be rather high - a fixed frequency would not be good enough and thus the PLL (or something similar) would be needed.
 

Online pigrew

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Re: Repair of Solartron 7081 SN#718
« Reply #53 on: July 24, 2018, 07:01:21 am »
I did a run with using a "better" clock last night, and it looks slightly cleaner.

My strategy was to still use the Solartron PLL (it's somewhat difficult to synthesize the high frequency), but add a FLL to filter the mains reference. I used a STM32F103 "blue pill" board to generate a 10 MHz reference using its 8 MHz crystal (I disabled the chip's PLLs, and directly used the oscillator to clock the MCU. This is lower jitter than if I had used the STM32's PLL.) I measured the input line frequency (in clock cycles) every second or so, and used a proportional controller to slew the output period towards the measured line frequency. It still takes a 3 minutes or so for the PLL to lock. It took half an hour for the instrument to stabilize (with auto-zero disabled).

The STM32's counters are only 16-bit, so they are not a good choice to use to generate the output signal. Instead, I used the SysTick module which generates a processor exception when the count rolls over using a 24-bit counter.

The mod does not require cutting any traces. Because the STM32 is a 3.3V micro, some level translation is needed. The MCU is 5V tolerant, but the 3.3V logic levels are not acceptable for the 4046 PLL IC. I re-used the existing LS04 to buffer the output. The CD4046BE has a V_IH of 3.5V. The LS04's output is lower than this threshold, but the circuit's pull-ups on those nets increase the V_HIGH above the CD4046's threshold.

The gain of my proportional controller is low enough that the sinusoidal fluctuations in the smoothed (n=8) test0 mode (~0.2 ppm p-p of range) look approximately equal to the rest of the noise. The unfiltered data has a standard deviation of about 3.5 uV (0.35 ppm of range), which is very similar to before the mod.

The 10 Hz output no longer tracks the phase of the mains, but I think that's OK. The AC RMS Converter (PCB6.5) uses the filtered 10 Hz to drive its chopper. The unfiltered mains 50/60Hz ("demodulator drive") is used to drive the input DC chopper. These are no longer in phase with each other.

So, I think I'll keep this mod (I still need to figure out how to properly mount the STM32 board since it doesn't have mounting holes), but the improvement is minimal. Even if the noise is increased or the same, I like this mod since it reduces the correlated/periodic noise.
 
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Online pigrew

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Re: Repair of Solartron 7081 SN#718
« Reply #54 on: July 24, 2018, 12:30:43 pm »
I just snapped a photo of the stm32 clock mod. I have not implemented the 50/60 Hz detection, so it only has four wires. Mine is fixed at 60 Hz; Go America! :) I also checked if the CD4046B was having issues with deadtime causing whiplash. It seems it is fine, or at least the gain in the circuit makes it not a problem. I didn't see any skipped charge injections when it switched from injecting (+) to injecting (-).

But, I discovered something quite odd... The shield PCB between the two floating-ground PCBs is itself floating! It seems that a PTFE washer bushing was used on the standoff isolating it from the guard (standoff->PTFE-bushing->PCB5->metal washer->nut), preventing electrical contact. I guess I should clean it up and make sure it has electrical contact? I assume it has to help with respect to noise to have it not floating.


EDIT: The extra capacitor on the second photo was my attempt to filter the mains's voltage (for the zero-detector).
« Last Edit: July 24, 2018, 01:55:28 pm by pigrew »
 

Online pigrew

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Re: Repair of Solartron 7081 SN#718
« Reply #55 on: August 11, 2018, 06:08:43 am »
It's been a week or two, but I've been busy with other tasks.

The latest work regards the RTC battery. The circuit is designed for a 3.6 V lithium thionyl chloride (LiSOCl2) cell, such as a Tadiran TL-4902. With the 3.6V, the circuit (National MM58174AN) draws about 18 uA, quite high by today's standards. The IC's operating current increases quite substantially with Vdd, so the designers added a series resistor to reduce the voltage to about 3.0 V which reduces the power consumption (though does waste energy in the resistor). With the reduced Vdd, it typically draws about 10 uA.

In my case, I replaced the existing TL-4902 with a Xeno XL-050FAX, which is of similar chemistry. Xeno suggests a depassivation technique for using cells which have been stored for >6 months by draining it with 30 mA for 10 to 30 seconds. I skipped this procedure, as I assume that it is mostly for high-pulse applications and that the passivation layer will slowly be remove through its lifetime.

I had contemplated using a LiMnO2 cell (3.0 V nominal) and get rid of the dropping resistor, but the LiMnO2's energy density is low enough that it would decrease the lifetime vs the LiSOCl2 cell.

(I did a quick run of a 5V reference, and noticed sub-ppm level steps during the auto-zero cycles. These steps do not happen when the input is zero volts. This will require further debugging, and inspection to see if some "charge-injection reduction" resistors were added to my auto-zero circuit or not. I pulled the integration capacitor from the board and tested it for leakage. The LC102 tester showed zero leakage at 100 V. I'll reinstall it (I have some replacements in stock in case I melt the capacitor or something. I may order some of the teflon standoffs to reduce PCB leakage, too, as Mickle has demonstrated on the input). Grounding the guard PCB did not significantly change the measured noise.)

(I ordered a replacement display that I was going to bodge in, but it turned out to be too deep, and doesn't fit between the blue filter and the PCB. I think I'll just order the correct part from eBay.)
 

Offline Kleinstein

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Re: Repair of Solartron 7081 SN#718
« Reply #56 on: August 11, 2018, 06:27:55 am »
AFAIK the steps during AZ cycles with a non zero input voltage are a kind of bug. Mickle did some investigations on this, and may even have a work around / fix. AFAIK this is some settling (possibly DA related)  problem when switching to Zero.

 

Online pigrew

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Re: Repair of Solartron 7081 SN#718
« Reply #57 on: August 11, 2018, 06:31:41 am »
AFAIK the steps during AZ cycles with a non zero input voltage are a kind of bug. Mickle did some investigations on this, and may even have a work around / fix. AFAIK this is some settling (possibly DA related)  problem when switching to Zero.
Kleinstein,

I've burnt his modified floating ROM which disables some input relays and extends the delay after switching in the zero... I didn't mesure with the stock firmware, so I don't know what difference it may have made.
 

Offline Kleinstein

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Re: Repair of Solartron 7081 SN#718
« Reply #58 on: August 11, 2018, 07:46:24 am »
The rather slow auto zero cycle of the Solartron DMM is a principle problem and thus a limitation of this DMM. Due to the rather slow conversions the AZ cycle is long (like minutes). Thus low frequency noise will come in even though they have an AZ at the integrator input. However there are other noise sources too, that can can include some 1/f noise: the amplifier for the +- reference, current noise (e.g. leakage) and thermal fluctuations for the resistors. There is a reason they used those super stable coupled resistors for the +- reference. A 1 ppm change in the resistor ratio causes about a 15 ┬ÁV change in ADC reading. So to get a stable 8 digit reading those resistors need to be stable (over an AZ cycle) to something like 0.01 ppm.  If the AZ mode works with a short it indicates that this part is actually working.

Another source of trouble with AZ is dielectric absorption (DA): it can make capacitors to settle really slow, over several second and even minutes. The integration capacitor is relatively large (slow modulation) and thus DA effects are larger than with more modern ADCs with faster modulation. The ADC is made in a way that the average voltage at the integration cap changes with applied voltage. So a step in input voltage will follow a slow relaxation. More delay can help here, but waiting for a slow decay has a limited effect.

A possible side effect of the zero measurement is, that the resistor for the input current to the ADC will cool down a little and need some time to get back to steady state temperature when measuring a stable reference. This would also contribute to INL and some slow settling on switching the input voltage.  Different from the DA effect (which should be about linear) this effect would follow a 3rd power law (square law for heating and one more factor from the resulting gain error to absolute error). One would not expect thermal settling after a step from positive to negative voltage.
 


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