The repair from He!! - HP 4275A LCR meter

[precaud]

"Sometimes you eat the bear and sometimes the bear eats you". This one has definitely been a bear, and so far, it is eating me.

It may take a few posts to set the table on this one, so pls be patient.

Several years ago I got two 4275A's at auction. No way to test before buying. My luck, they both had issues. This one booted but my notes say it had issues on the A2 board. The other one didn't boot. So I stole the cpu card from this one, which made the other one a working machine, which I sold shortly thereafter, and set this one aside for a rainy day. A few years pass... I "find" this one sitting in a storage room, and I sure would like to get it working. A good 10MHz LCR meter would be a nice thing to have.

An internet search revealed several posts describing the frequent occurrence of "mask ROM rot" in this and its 4274A sibling. The symptoms described were the same as mine. One poster said the second ROM (U3) was where the boot code resided so try replacing it first. An image of supposedly good ROMs is posted in the files section of the Yahoo Agilent group. A message to the person that posted them went unanswered.

Another piece of interesting info gleaned from other posts is that the 4275A shares many components with the 4274A. The cpu board (A9) and memory boards (A8) are supposedly identical. Even the ROM code. Examining the service manuals seems to support that; the part number for the 4275A ROMs begins with "04274A-". I have an early non-working 4274A here, so I can check that out.

Unplugged the GPIB card and its U10 ROM to simplify the setup, powered up this 4275A, and the display is dead. Nada. I then swapped the 4274A cpu card in, and voila, it boots, passes ROM and RAM POST tests (the five P's it displays) and looks like it is trying to make measurements but returns every time with error 4 (with or without a test fixture installed).

So I unsoldered the U3 mask ROM, installed a socket, burned a 2764A EPROM from the image file, and compared it to the mask ROM. No difference. That nixes the idea that U3 has the boot code.

From the factory, the firmware on some boards came on mask ROMs, and others on EPROMS. There are jumpers on the cpu board to set it up for one or the other (not a mix; has to be all one or the other). So there is no good way to replace just one ROM with an EPROM. So I unsoldered the rest of the ROMs and installed sockets taken from surplus pcbs. The desoldering gun got a good workout. Burned the full set of EPROMs from the image file and compared them to the old ROMs. There was one byte different on U1. U3, U5, U7 were the same. U10 had hundreds of different bytes. Supposedly that is for the GPIB option. But it is not installed right now so that is not stopping it from booting. Could one "bad" byte on U1 be locking up the machine? The only way to know is install the EPROMS and change the jumpers for them.

Did so, but no difference. Still dead.

I swapped the MC6800 cpu from the 75A board into the 74A board and it worked fine. So we know the cpu is good.

The service manual has a troubleshooting section on interpreting the five P's displayed at power up, and which ROM (or RAM) is bad if it halts there. It says if no P is displayed, then U10 is bad. So I plugged in the U10 EPROM and the GPIB card and restarted. Nada. No difference.

It is now maddeningly clear that both the manual and anecdotal info on this machine are riddled with inaccuracies.

Here is a photo of the machine with the 4274A cpu board in it. Looks normal, eh? Second installment follows.

[precaud]

OK, the manual is giving wrong info about POST so I started looking at signals on the cpu card. Clocks and supply voltages were good, everything else hung either high or low; no activity. The manual troubleshooting procedures assume you have an HP 5004A Signature Analyzer, which I do not have. Knowing the cpu is good, I started replacing chips which *should* have output to the test points. This is one of those moments when hoarding 74LS chips for all these years came in very handy. And sure enough signals started to appear. Activity on the address bus after replacing those buffers. Then the data bus transceivers (though their falling edge looked messy). This went on for the better part of two days by which time I had replaced all but four chips on the board. Some kind of cascade failure had occurred on this thing. By now a couple dots showed in the displays at powerup, but still no boot.

At this point I stopped to study the digital systems memory map, cpu opcodes, and ROM files, looking for more clues. When the 6800 wakes up, it reads a 16 bit pointer from the very top of the 64kB memory space (locations FFFE and FFFF), which has to contain the address of the Reset routine. Low and behold, that address is F815, which is in ROM 1 (U1) address space, and not U3. So let's look at what the machine does on boot. I did a quick "hand disassembly" of the boot area of ROM 1.

Code: [Select]

--------------------------
HP 4275A boot code

Boot Address (from Reset vector @ FFFE) : F815  (on ROM 1)

F815: JMP F876
 :
 : some more JMP's and code...
 :
Reset:                       ; startup routine (on powerup or when reset line pulled low)
F876: LDS        03FF ; Set stack pointer 1/4 way into SRAM addr space
LDA A 0FFF ; get the last bye of SRAM into accumulator A
CMP A FF ; if all bits high, SRAM is defective or not installed,
BEQ F3         ;   branch if == (-115 bytes relative) to abort
LDA B FC    ;  otherwise continue
STA B 800B ; initialize something on A7 board ( peripheral control =  8xxx address space)
LDA B F4
STA B 8009 ; and another
CLR    016C  ; zero a byte in SRAM
CLR    016D ; another
CLR    016E ;  "
CLR    016F ;  "
CLR    0181 ;  "
                        ;  ... it does this a few more times ...
Loop: CLR    0189 ;  last one
LDA A 01B7 ; load byte at 01B7 into A (startup set it to zero...)
F8C0: NOP    ;  Why NOP? It works around a bug in pre- Nov '77 6800's before setting or clearing interrupts.
EOR A B6 ;  Exclusive OR A with 10110110
  SEI    ; set interrupt mask (disable interrupts)
STX    81FE ; store index register to something on A7 board (peripheral control)
BEQ 26      ;  branch if == zero +38 bytes rel.
CMP A FD    ;  a bunch of compares follows
BEQ 40      ;  branch if == +64 bytes rel.
CMP A FC
BEQ 50      ;  branch if == +80 bytes rel.
CMP A FB
BEQ 15      ;  branch if == +23 bytes rel.
CMP A FA
BEQ 0A      ;  branch if == +10 bytes rel.
CMP A F9
BEQ 09      ;  branch if == +9 bytes rel.
CMP A F8
BEQ 08      ;  branch if == +8 bytes rel.
BRA A7      ;  otherwise an unconditional jump -39 bytes (to Loop)
.
.
.
------------------------
And we see here a bunch of housekeeping code that makes sense for what should happen at bootup.
It first sets the stack pointer into the static RAM address space.
Then it reads the last byte of the SRAM to see if the chip is absent, or defective, and aborts if so.

And there is our first clue. The first thing tested is the SRAM. If no "P" appears, it means the SRAM is bad, not U10 like the manual says. And that makes logical sense; if it has no ram to work with, it can't continue.

You have to wonder, did they print that by mistake, or is it intentionally misleading? Why? Because U10 is an OPTION ROM !!  Many 74A and 75A's don't have it.

Anyway, I need to check the SRAM chips.

The pic below shows the cpu card with most of the IC's that were replaced. Third installment follows.

[precaud]

So I need to test the SRAM chips. Since the 4274A board passes POST, it's SRAM chips must be good. I removed the 2114s from both boards, installed sockets, and swapped 2114's one at a time onto the 4274A board. One of them was bad. Pulled some 2114's from a Keithley 192 carcass I had laying around, tested them, they were both good, so cleaned and installed them into the 75A board. And now it boots with more activity. A Letter appears in the 2nd display, and a P in the third.  See pic below, showing the cpu on extender boards. First evidence that it is really trying to boot.

So it is starting the POST but not completing it. Some signals at the test points now more closely resemble those of the 74A board, though one is missing. Press a front panel key, and the INT line goes low (as it should). So the hardware part of the interrupt system is working. After a reset, I see a few hits on the U1 Rom select line, which suggests it is executing at least some of the startup code there, as it should. But it never completes the POST.

And this is where I'm stuck. Something is hanging the cpu after it begins the POST routine.

I have a logic analyzer (HP 1631D) but have never used it. And the manual doesn't give timing diagrams for the digital boards.

I welcome any and all input, suggestions, observations, theories, commiserations, comments. The way I see it, after replacing all the chips, the thing should at least boot. Unless one or more of the chips I installed was bad...

[Tomorokoshi]

Comments:

1. I don't have any equipment of that series, but I do have equipment from both before and after it.

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

3. A lot of HP LCR equipment seems to come out of HP Yokogawa in Japan. It's possible that the manuals were originally composed in Japanese and then translated. This may account for some of the errors, although overall I've found HP Yokogawa manuals to be very good.

4. HP LCR equipment also seems to usually have that one unobtainium part that's plated with impossibilimite. Although, in this case it seems to be related to general logic.

5. For manuals are you using the rough scans from Keysight? Artek has scans, although I didn't need to get that set.

6. Did you check the "Manual Changes" section of 04275-90012? More changes than most others I've seen.

[precaud]

Comments:
1. I don't have any equipment of that series, but I do have equipment from both before and after it.

Thanks for your input!

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

Good idea, I'll check it. Though it has to be said, the failures to this board happened when it was installed in a different 4275A...

3. A lot of HP LCR equipment seems to come out of HP Yokogawa in Japan. It's possible that the manuals were originally composed in Japanese and then translated. This may account for some of the errors, although overall I've found HP Yokogawa manuals to be very good.

Very good point.

5. For manuals are you using the rough scans from Keysight? Artek has scans, although I didn't need to get that set.

I have original manuals (for 4275A and 4274A), and a downloaded PDF of each too.

6. Did you check the "Manual Changes" section of 04275-90012? More changes than most others I've seen.

Absolutely. And most of the changes are on the A9 board, most of them related to the battery-backed RAM option. The way to avoid any problems related to that is to simply remove the battery. A dead battery can cause power-up errors. The rest of the basic circuitry was remarkably stable from the start. This particular unit is from the final serial prefix, though the A9 board is from an earlier unit.

[precaud]

2. With multiple chip failures check the power supply. Is it going over-voltage when turned on? Turned off?

I checked the +5V supply at the board and it ramps up and down smoothly with no glitches or spikes.

Since the cpu is known to be good, I'm going to concentrate on the support chips immediately connected to it. I'm particularly suspicious of the 74LS243 data bus tranceivers, their waveforms aren't nearly as clean as the address bus buffers'.

[precaud]

Update: after wasting another day or two with a logic analyzer with no success, I punted and bought an old Tek 308 data analyzer, which has a signature analysis mode. After confirming the unit works, I checked a known-good unit to verify that it gives identical results to HP's analyzer. It does.

With this cpu board, it gave FAULT condition on every pin probed, even when a scope showed that a pulse train was there. On a whim, I decided to move the clock lead to the opposite-phase clock, and suddenly most (but not all) of the signatures were correct. Very interesting. So problem one points to the two-phase clock generator. It looks good on a scope, but the sig analyzer says they are phase-swapped. Hmmm.

After that, checking the ROM and RAM selectors chips, the input sigs are fine but the outout sigs are all wrong.

So at least now I have some purposeful things to investigate.

(BTW: for anyone who gets a 308, the P6451 probe specifies an 012-0747-00 lead set for it. Just wanted to put it on record that the more common 012-0747-01 lead set works fine.)

[precaud]

It really helps to have the right tool for the job. The signature analyzer is really needed to troubleshoot the digital circuits on this beast.

It found that one of the 74LS138 ROM selectors that I had installed was itself bad.

After that, all of the signatures except the ROMs were correct. Yet it still would not boot.

As Tomorokoshi mentioned, from introduction there were quite a few changes made to the A9 cpu board. This particular board falls somewhere in the middle of the change history. Nearly all of the changes to this board had to do with two things: 1) the morphing circuitry for the battery-backed RAM option, and 2) support for both mask ROM and EPROM firmware, and EPROMs of different size. It turns out the digital signatures for boards with these changes are not completely identical. The data bus signatures are different. This board appears to support EPROMs (has jumpers for it) but doesn't work when they are installed and the jumpers changed. The data bus signatures are different.

Well I don't have time or interest to get that deep with this repair. I have WAY too many hours into this thing as it is. So I decided, as a last resort, to put the mask ROMs back in and test. If it doesn't work, I'll put the unit aside until I find a good cpu board.

To my surprise and glee, it powered up and booted without errors!

So now I can debug the analog circuits. My previous notes said there were issues on the A2 board.

Some notes in no particular order for others who have the displeasure of troubleshooting the digital circuits of their 4275A:
: Although the 4274A and 4275A cpu boards have similar part numbers, it seems they are not identical. When I plug a good 4274A cpu board into this 4275A, it boots but the measurement control is all wrong.
: The firmware available for download on the Yahoo Agilent user group files section works with cpu boards numbered 04275-66529 and later. It is not compatible with 04275-66519 and earlier boards.
: The battery-backed RAM option is pretty useless and is best disabled, IMO. All it does is remember the last setup and restore it. If anything goes wrong with it, (bad static RAM, battery, diode, etc.) the functioning of the entire machine is disabled. Best to just remove the battery and U14 and U15 RAM chips.

And for those using the Tek 308 for signature analysis instead of the HP 5004A:
: The 308 uses a Tek P6107 (13pF) for data input. I don't have a P6107. As I learned, it is pretty finicky about the input C of the probe. A P6106 (10.5pF) didn't work. But a 2-meter P6105 with 13pF input C worked.
: The manual shows the data probe being used without a ground lead. But it absolutely needs the ground lead attached to the circuit! That was the cause of the "clock phase error" issue I was having.

Perserverence furthers. Back to the analog world now.

[Tomorokoshi]

Good to see another success. Interesting how that battery circuit keeps coming up. By chance this thread covers similar gremlins with later models:

https://www.eevblog.com/forum/repair/hp-4194a-impedance-analyzer-a678-boards/

[precaud]

Yes, the unpredictable behavior of HP machines from that era caused by battery issues has created some spectacular buys over the years.

Well the good news with this unit is, it basically works, but has issues in some freq and impedance ranges. Ex: It measures a 1k Ohm resistor across the entire freq range, and gives measurement results one would expect to see. But a 100 Ohm R only works below 1MHz; the display blanks at 1MHz and above. Its a bit more complicated evaluating it using C's and L's due to the limits placed on their displayed values vs freq in the firmware. (See ** below)

The troubleshooting tree symptoms point to the A2 modulator board. The troubleshooting guide table says freq-dependent issues are in the A6 Oscillator. But the oscillator checks out fine. Once again, the manual may be of limited help. My sense is, the issue is downstream from the DUT, in the receiver sections. When the measurement fails, the values in the V and mA displays also fail.

To be continued...

** Some historical and functional context: When it came out (1980), the 4275A (and to a lesser extent the 4274A) LCR meter was the cat's meow, easily outperforming anything else on the market for freq range coverage, accuracy, measurement speed, programmability, you name it. They (and the YHP 4192A) were pretty much the only game in town for high-freq impedance measurement for several years. I spent way too many hours drooling over their specs in the HP catalog.

An annoying idiosyncracy of all of the HP 427x-series meters is the capacitance (and inductance) measurement limits imposed by the firmware at high frequencies. They will simply not allow you to measure large-value capacitors or inductors at high freqs. Example 4275A limits: 200uF max must be <= 20kHz; 20uF <= 200kHz; 200nF <= 2MHz; etc. For capacitors larger than that above those freqs, the firmware simply blanks the displays.

So why did they (YHP) do this? It is now common knowledge that capacitors become inductive at high frequencies. But it wasn't widely known back then. Plus, how to accurately measure low Z at high freqs was still very much an art in progress. LCR meter designers (and marketing dept's) were faced with the dilemma of what to do with large C's (and L's) at high freqs. The fact is, capacitance becomes a meaningless measurement parameter as the phase approaches zero and becomes positive. Yokogawa's solution was to place conservative limits on the range of capacitance they would allow to be displayed at a given measurement frequency.

This was quite irritating for those interested in exploring the behavior of, say, large caps at high freqs. With capacitor in hand, they wanted to know how much capacitance it had at say 1MHz. They didn't want to be told "there isn't any". Even if that was the truth.

Fortunately, there is a workaround. Simply put the instrument in impedance/phase mode and do the math yourself.

Miniaturization and circuit integration has not been kind to these instruments in the 427x series. In today's terms, they are called boat-anchors. But I would argue, not all of them are. The 4274A probably is; you can buy handheld LCR meters that do most of what it does for less than $100. But the 4275A (and 4276A for different reasons) are exceptions. Have you shopped for a 10MHz LCR meter recently? They are still mui expensive. New ones start at near $10,000. That's why this venerable machine has held its value; a good used 4275A is a very reasonable alternative. And that's part of what makes reviving this instrument so compelling to me.

[precaud]

It appears the earlier analysis of issues on the A2 Modulator board was correct. That's where the adjustment procedures fall on their face.

I've attached part of the circuit diagram of the relevant section. The current- and voltage-sensing inputs are conditioned on the input board and fed here into transformer T6 at the upper left. Post-xfmr it goes into two identical MC1496-based circuits. The only difference between them is, one is multiplied by the test signal, and the other by a 90-degree phase shifted version of it. The outputs of these are summed in a diff amp (1/2 of a 1458 opamp) and then integrated (in the other half). The pots R13 and R14 on the non-inverting input of the integrators is for DC offset nulling.

Both sections (in-phase and quadrature) are calibrated by first nulling the offset with a 100kHz test freq, and then verifying that the DC offset (which the instruemnt picks off after the modulator sections that follow) doesn't increase as freqs are increased, up to 4MHz.

And that's where this unit fails. Both sections have offsets that vary significantly as frequency increases, and this stops the bridge circuit from balancing.

The manual specifically states that the probable cause of failure to balance these adjustments is "excessive output voltage" in the U3 and U4 1496's.

This obviously points to replacing the 1496's.

So I pulled the board, checked the ESR of the 33uF lytics in this section, and replaced them, though their ESR was not that high (about 0.7 Ohms) for a 33uF. While doing so, I noticed that the board had been service before. The U3 and U4 1496 IC's had been replaced.

Now this isn't what you want to see when repairing a piece. It suggests that the prior owner had already troubleshooted (troubleshot?) this problem, followed the manual's procedures which led to these 1496's, replaced them, found no improvement, and sold the instrument.

I checked the DC offset of each 1496 at TP8 and TP9, before the nulling integrator. One is 10mV, the other 60mV. It doesn't change with frequency there. So the fault may actually be in the modulator section(s) that follow, also 1496-based. They too see the test freq directly.

[precaud]

I was too tired to post after last night's session ended.

Since the manual specifically stated (in the calibration section) that "excessive" DC offset stops the bridge from balancing, and one of the phase detector demodulators had 6x more offset than the other, and that IC was in the quadrature circuit path (from which reactance calculation is made), I decided to replace that 1496. I have to be selective because I only have three known-good metal-can 1496's in my parts stash. And they are not plentiful on the market. I have several 1496's in PDIP package but grafting one in would not be easy.

So I replaced U3, and measured the DC offset at TP9 at 100kHz. Was previously 60mV. Now is... 60mV. No change. This suggests that perhaps component tolerances are the cause. I compared all the resistors around U3 and U4. No significant difference.

I hate it when things don't make sense.

Checked every inter-stage capacitor on the board and they all look fine.

Went back and redid the A2 balance cal procedure, and was able to get the two sections to balance at 100kHz. It holds up until 1MHz, when the quadrature section offset jumps way up and the displays blank just as before. So a minor improvement but still the same fault symptoms.

Am mulling where to go from here. Maybe replace the 1458 opamp with something that has lower guaranteed offset spec? Any other ideas?

[precaud]

I replaced U8 MC1458 with an LT1013. DC offset at TP9 went from 60mV to 3mV. If the manual is to be believed, that, should improve the balance.

After warmup, readjusted the 100kHz offsets. No change. And same with measurements of 100 Ohms and less, which are OK up to 400kHz and blank displays from 1MHz and up. So something else is causing this problem.

[precaud]

I think I found the cause. It's in the lower left corner of the diagram posted above. The 90º phase shifter is more like 150º. At all freqs. Crossing fingers that it is not Q10 that is bad, that is a 6-legged MOSFET (1855-0261) made by Sony that will likely be difficult to find...

[precaud]

Returning to the analogy I started with, this circuit is the bear's lair, where it drags its kill and munches leisurely. I took the schematic and removed nonrelated portions to isolate it.

The purpose of this little circuit is to generate a quadrature (90º phase-shifted) version of the sinewave test signal, from 10Khz to 10MHz in 1-2-4 sequence. No small feat. (Nowadays, with a fast-enough DAC, you'd probably just do it digitally.) The operation of this A2 modulator board (especially at high freqs) depends on it generating a precise 90º shifted version.

I do not understand how this little circuit works. I've never worked with the 1496 modulators before. The manual doesn't describe the circuit in detail, but says to verify that the output at TP3 (lower right) is precisely 90º offset from the 0º input at TP5 (center top) at all freqs.

And it isn't. It's more like 150-160º, not quite inverted, over the whole range. So the circuit is generating a constant phase offset, just not the correct one.

In case of error, the manual says to check U1 (a 1458 opamp) and U2 (a MC1496 mod/demod). Since I have those parts, I just replaced them rather than figure out if they were good or not. Unfortunately, that made no change.

Before going further, I checked all active devices (except Q10) and capacitors and saw nothing wrong.

Overview: The test signal enters upper left "Osc in", is xfmr-isolated and goes through an AGC leveling amp. This is the in-phase reference signal. It feeds the 0º detector and phase-tracking, and is the input to the 90º shifter. It is buffered and drives xfmr T3. One side of T3 has two capacitors that are switched in by comparator U10 depending on the freq range, which is controlled by logic coming from another board. I verified that this part works properly.

Within each decade range, the signal coming from U2 & U1 controls the phase offset via the mosfet Q10. I do not know how to debug this. But it appears to me either T3 or Q10 are the faulty parts. If I see opposite-phase signals on either side of T3, it should be OK. Will check it today.

But the main suspect is Q10. This part is made by Sony and marked as "429D". The only info I find about it is:

www.ozvalveamps.org/repairs/circuits/stomps/tx-429d-datasheet.pdf

It appears to be unobtanium.

I welcome any suggestions.

[precaud]

Further thoughts. I think they're using the mosfet as a variable resistor, changing the time constant of the LC it is paralleling (1/2 of T3 and the selected capacitor). So is the signal at TP1 a DC proportional to the phase difference between the input (sampled via C4) and the phase shifter (via C21) ?

This appears to be the same part as the Sony one:

https://www.mouser.com/new/vishay/vishaysia429djt/

Its no longer available in PDIP so I would have to kludge the SC-70 package in.

[Tomorokoshi]

I got as far as this:

The Japanese document claims that the Sony TX-429D is an N-Channel device. The Mode is not specified. I suspect Enhancement Mode should be fine.

It is unclear if the Vishay part just happens to use the same "429". Alternatively, the Japanese datasheet could be incorrect.

Trolling around Digi-Key got results in N-Channel similar to your option:

https://www.digikey.com/product-detail/en/diodes-incorporated/DMN32D2LDF-7/DMN32D2LDF-7DICT-ND/5218399
https://www.digikey.com/product-detail/en/rohm-semiconductor/QS5K2TR/QS5K2CT-ND/1144089
https://www.digikey.com/product-detail/en/on-semiconductor/CPH6636R-TL-W/CPH6636R-TL-WOSCT-ND/8538394

[precaud]

I got as far as this:
The Japanese document claims that the Sony TX-429D is an N-Channel device. The Mode is not specified. I suspect Enhancement Mode should be fine."

Thank you for looking at this, Tomorokoshi. I didn't know what to make of it.

It is unclear if the Vishay part just happens to use the same "429". Alternatively, the Japanese datasheet could be incorrect.

Yes, that is uncertain. The HP manual isn't of any help. The parts list describes it as "TEANSISTOR MOS-FET PD=100mW ID=15mA"

The Vishay part will not work, it has a diode from source to drain.

This link describes the 429D as a P-channel:
http://www.ozvalveamps.org/repairs/tx429d.htm

This is a schematic from a Korg guitar EQ pedal that used it. It looks like the same device.

[rf+tech]

Hello precaud,

The suspect Q10 can be tested in-situ by removing U1 and applying a bias voltage to TP1. Monitor the phase across the shifter, while varying the applied bias, to see if the phase varies as expected.

RF+ Tech

[precaud]

That makes sense, thanks for the advice.

I did some looking last night for other HP instruments that use the 429D mosfet and the same xfmr T3. And found that the 4274A has them as well. So I should have good spares for both of them if needed.

[vtp]

Seems like interesting circuit. Good source for circuit theory could be googling "90 degree phase shifter". In the results there should be W. Wiebach article about dome filters. The text contains also references to other publications.

The transformer appears to have been used only for galvanic isolation. Bottom leg of the output is capacitive with switched ranges and top leg is adjustable resistor to fine tune the phase shift. MC1496 appears to be phase detector so they want to see 90 degree phase difference between the circuit and it's reference. The output is used to adjust the resistance in the transformer top leg output. Seems like a RC phase shifter, I am not sure if it's dome filter or something else but the transformer driver looks a bit weird.

If your Q10 indeed is dud you may want to take a look at CXD7500M.

[rf+tech]

For reference, CXD7500M can be found in the 1992 Sony Discrete Semiconductor Databook (link ftp://bitsavers.informatik.uni-stuttgart.de/components/sony/1992_Sony_Discrete_Semiconductor_Data_Book.pdf)

Extracted CXD7500M-specific pages are attached below.

RF+ Tech

[precaud]

I didn't expect it to be bad, but for certainty's sake I tested the T3 xfmr, it is fine.

As rf suggested, I then pulled U1 and applied DC voltage to TP1 while monitoring the original and shifted waveforms. Changing the DC did not change their phase offset, which suggests that the mosfet is bad.

So I swapped in a 429D from a 4274A board, reinstalled U1, and tested. The only change is, the waveforms are now exactly 180º out of phase instead of the 160º they were with the original mosfet.

I have tested or replaced all of the active components in this loop. I guess I have to check all the passives too.

[precaud]

Referring to the diagram in reply #15, the way I see it, the phase-fine-tuning action of Q10's variable R only works of it is in the same general impedance range as the capacitors it is in parallel with. With the waveform at TP3 always at or near inverted, the circuit is acting like there is a low impedance (large capacitance?) across C44 at all times. That's the only thing I can see that would essentially swamp the tuning action of Q10 in conjunction with the capacitors being switched in, and result in very little DCV variation at TP1. It's still not clear to me what the mechanism is that causes this circuit to seek balance at 90º offset. But the major part of the tuning is being done by C46 and C49 being switched in at the appropriate freq range(s). So Q11 and Q12 will get tested out of circuit today. According to the logic table, those switches are never closed at the same time. The logic (latches) that controls them is on the A3 board so that will get checked too.

[precaud]

Finally something makes sense. Both FET's are shorted. Which means, as I had reasoned, all capacitors were in-circuit all the time. Which, in normal operation, never happens.

Once again, the 4274A carcass to the rescue. The parts list says it has 12 of 'em. I started pulling and testing them one at a time. Most of them were bad. It took 10 to get two good ones.

The HP part number is 1855-0091. An N-channel JFET, probably selected for low on-resistance. A quick search revealed others having difficulty finding a cross for it in the recent past. The closest being a 2N4391. I probably should get some spares to have on hand.

I'll install these two and test after dinner.

EDIT: OK, I couldn't wait. Unfortunately the new FETs made no difference.

[vtp]

How did you test the JFETs?

They are depletion mode so if you just take one off the board and measure between drain and source you will see ohmic reading, maybe in few tens of ohms. Depletion mode (they all are depletion mode) N-JFET needs negative gate to source voltage to turn it off.

You may want to check the capacitors for shorts, especially if they are ceramics.

Q10 is also depletion mode but a p-channel MOSFET - a quite rare thing today, especially with body (substrate) brought out. If you take a look at its characteristics it should give an idea how the control of the phase shift at the MOSFET gate works.

Just a note on testing semiconductors: If you want to be absolutely certain that a device works or does not, do not use anything but a curve tracer to check it. Multimeter diode tester may show that bipolars or any other PN-junctions are ok even though device gain may be almost non-existent. Has happened to me and have learned the lesson.

For FET information, I would highly recommend Siliconix book Designing with field-effect transistors, 2nd ed.

[vtp]

Just out of curiosity I made a LT-Spice model of the phase shifter.

It looks like the controlling resistance would need to be very low compared to the fixed resistance in the upper transformer leg path in order to get any phase shift out of the circuit.

So, I would concentrate my efforts to find out why Q10 is not controlled properly. It is a depletion mode p-channel MOSFET so it is normally on (hint is a continuous line in the symbol which denotes depletion mode FET - straight through). To turn it off gate to source voltage needs to be positive as it is p-channel. If you measure the gate voltage I would guess you get about 12 volts so the FET is totally off. In that case the simulation model shows what you seen on your scope screen, a 180 degree shift.

Measurements in the model are taken from R7 and V1.

[precaud]

How did you test the JFETs?

I used one of the ATmega-based transistor testers, which has correctly identified everything I've thrown at it so far. Of the 10 I tested, it identified most of them as two diodes, a couple as a diode and a resistor (20-ish ohms), and two as JFETs. It did cross my mind that maybe it has trouble with low-Rds-on JFETs.

After installing them in circuit, I verified the switches were acting correctly by measuring ACV across each JFET while turning them on and off. No-voltage condition = JFET on.

They are depletion mode so if you just take one off the board and measure between drain and source you will see ohmic reading, maybe in few tens of ohms. Depletion mode (they all are depletion mode) N-JFET needs negative gate to source voltage to turn it off.

Understood. That is what the circuit does, Vgs ~ 0V for on, -11.5V for off.

You may want to check the capacitors for shorts, especially if they are ceramics.

While I had the FETs out, I checked the two that are switched, one a mica, one a film, they measured good. The 39pF is also mica, I didn't bother with it, perhaps I should have. But I've never seen a mica cap go bad. I'll pull it today and check it.

Q10 is also depletion mode but a p-channel MOSFET - a quite rare thing today, especially with body (substrate) brought out. If you take a look at its characteristics it should give an idea how the control of the phase shift at the MOSFET gate works.

Now that I have confidence that the capacitor switching is working (which is where most of the phase shift occurs), Q10 is once again the "prime suspect". Each capacitor covers approx a decade freq range. Ex: the 5.6nF covers 10kHz-100kHz. At 100kHz, the impedance of the cap + FET is about 300 Ohms. Same for the 560pF at 1MHz. So I think mosfet Q10 resistance will be low (~1kOhms and less) to affect phase. Your model agrees with this.

I removed U1 (again) and installed a socket to facilitate testing Q10 with the known-good cap switches. Using DCV as high as +2V (I don't think the 1496 + U1 circuit produces more than that) on Q10, it is not changing the phase. It is acting "open". If it were shorted, the signal at TP3 would be in-phase, not inverted.

Just a note on testing semiconductors: If you want to be absolutely certain that a device works or does not, do not use anything but a curve tracer to check it. Multimeter diode tester may show that bipolars or any other PN-junctions are ok even though device gain may be almost non-existent. Has happened to me and have learned the lesson.
For FET information, I would highly recommend Siliconix book Designing with field-effect transistors, 2nd ed.

Thanks, yes, this experience has made me suspect of FET testing. A dedicated tester is probably needed.

I am thinking that Q10 may also need to be tested out of circuit.

It is still not clear to me: what is the mechanism that causes this circuit to seek the 90º phase offset condition?

Thanks for your help, vtp.

[precaud]

The 39pF mica tests fine.

FWIW, the block diagram of the modulator board shows the same general functioning that we've sussed out...

[Kleinstein]

The part around U1, U2 is a phase detector and loop filter.  So the circuit is a kind of PLL with the phase shifter instead of the more normal VCO. It looks for the signals send to the MC1496 to be 90 phase shifted.

The control voltage at the gate of Q10 might go rather negative in some cases, at least for the new sony CX07500M part.
The circuit also allows for quite a negative voltage. So I would expect something like -10 to 0 V at the gate of Q10.

Just for curiosity: how large is the amplitude at the phase shifter ? 

[precaud]

The part around U1, U2 is a phase detector and loop filter.  So the circuit is a kind of PLL with the phase shifter instead of the more normal VCO. It looks for the signals send to the MC1496 to be 90 phase shifted.

I understand that, with same-freq carrier and signal, the 1496 can be used as phase detector. I just don't grok the mechanism that causes this circuit to "balance" at -90º offset.

The control voltage at the gate of Q10 might go rather negative in some cases, at least for the new sony CX07500M part.
The circuit also allows for quite a negative voltage. So I would expect something like -10 to 0 V at the gate of Q10.

I assumed CR1 oriented as it is across C18 would result in only positive voltage output, no?

Just for curiosity: how large is the amplitude at the phase shifter ?

Not very high, only 1.3Vp-p at the input (C38) and about half that at TP2 and TP3. So the voltage swing at U1 can not be very large...

[Kleinstein]

I would consider CR1 a limiter for the control voltage to prevent it to go too positive (e.g. more than about +0.7 V). The normal working range is likely in the negative range, maybe from -8 V to -2 V. There likely is some note in the service manual about the voltage too, as it is a test-point. The circuit could vary the voltage from about -10 V to +0.6 V. So for a manual test this range could be checked.

The circuit around U1 is a difference amplifier with a little gain (e.g. 1.5) first and than followed by an integrator use to regulate the phase. So depending on the phase measured the control voltage is slowly adjusted up or down.

Something like 0.6 V voltage swing is still too much to replace Q10 with something like a photo-fet.

[vtp]

I assumed CR1 oriented as it is across C18 would result in only positive voltage output, no?

No, Kleinstein is right. The U1 circuit only allows highly negative or slightly positive (about diode drop) control voltage range. It goes very fast negative even with very small positive input.

Q10 seem to be quite weird thing indeed. I think it can be assumed that it has negative treshold voltage and that the channel is normally off (which is contrary to normal depletion mode operation and how it has been drawn) if it is anything like the newer part.

For out of circuit measurements I would like to recommend Tektronix 577 with storage display. They can be had for reasonable money and are easy to recondition and adjust to mfg specifications - in case you need another project in future.

[precaud]

Interesting. Unfortunately the manual gives no clues about what to expect for the control voltage.

Yes, diff amp with a little gain, followed by integrator. As it is now, with phase near 180º, voltage at TP1 is around +0.5V and varies very little (<0.05V) as freq is changed. I think I would need to study the action of the 1496 to understand it better. The waveform I see now (at diff amp output) is a triangle wave at same freq as input.

This is 100kHz input waveform (sine, 500mV/div) and output of diff amp (triangle, 1V/div) with the phase shifter output as it is now, inverted. There is not much DC offset, but it is a little negative. Triangle increases to ~9Vp-p at 10kHz and decreases rapidly with freq, as you'd expect with a 1458 and 470pF in the feedback loop. This results in about +0.5V gate voltage. Even at 10kHz, with 9Vp-p at diff amp out, gate voltage is still ~0.5V. It never goes negative.

[precaud]

No, Kleinstein is right. The U1 circuit only allows highly negative or slightly positive (about diode drop) control voltage range. It goes very fast negative even with very small positive input.

OK, thanks for confirming.

Q10 seem to be quite weird thing indeed. I think it can be assumed that it has negative treshold voltage and that the channel is normally off (which is contrary to normal depletion mode operation and how it has been drawn) if it is anything like the newer part.

The only mention I see in CX07500M data sheet is on p.4, the attenuation test uses threshold voltage of -1V.

For out of circuit measurements I would like to recommend Tektronix 577 with storage display. They can be had for reasonable money and are easy to recondition and adjust to mfg specifications - in case you need another project in future.

Thanks for making another future project for me 

[precaud]

I decided to try a negative gate voltage for Q10. You guys were right, that's what it needs to be.

This is a 10kHz signal with U1 removed and a negative DC supply at TP1. Threshold voltage is somewhere around -1V. The -90º phase offset shown in the photo was at around Vg of -1.2V.  Changing the freq to 40kHz, -2.8V was required for -90º.

So, the good news is, Q10 works. The question is, why is there no negative voltage coming out of U1?

[rf+tech]

precaud,

Consider the mixer equations:

With two different frequencies, there will be two IF outputs

Code: [Select]

  A1 = cos [(ωLO – ωRF)t – (ØLO – ØRF)]and

Code: [Select]

  A2 =  cos [(ωLO + ωRF)t – (ØLO + ØRF)]plus higher order products. In down-conversion applications, low-pass filtering removes A2 and higher products.

With two equal frequencies, ωLO – ωRF is zero, leaving A1 = cos (ØRF – ØLO). Again, the A2 summation products (2f) are removed by filtering.

With two equal frequencies applied to a balanced modulator (used as a phase detector), the IF port difference term is DC and related to the phase angle between the two inputs. The IF output will be maximum positive at 0 degrees (cos 0 = 1), maximum negative at 180 degrees (cos 180 = -1), and zero at 90 degrees (cos 90 = 0). The natural tendency of the IF DC output is to drive the controlled element in the direction that will satisfy the A1 equation.

Code: [Select]

Ex: ØRF is  +55 degress relative to ØLO    cos(+55) = 0.57
Ex: ØRF is +150 degrees relative to ØLO   cos(+150) = -0.87
Ex: ØRF is  -20 degrees relative to ØLO    cos(-20) = 0.94
Ex: ØRF is -100 degrees relative to ØLO   cos(-100) = -0.17

Notice how the sign changes when the difference exceeds 90 degrees. This process is similar to negative feedback around an opamp, driving the inputs to equality.

These values are scalar, multiplied by the loop gain factor. It's not just the apparent DC gain based on U1 and its feedback resistors - there's also the non-obvious "sensitivity" of the controlled element - expressed in degrees per volt (or MHz/volt as with a VCO). What may appear to be a small DC swing can have a much larger effect.

As to exactly why 90 degrees requires an understanding of vector rotation and summation, something that could best be explained by Alan wa2aew, if he has not already done so.

Now, apply this knowledge to the scope photo. When both signals are present, the differential amp output should be DC. But there's a triangle wave at the input frequency. This implies one of the two inputs to U2 is missing, insufficient amplitude or U2 is defective.

RF+ Tech

[Kleinstein]

A working Q10 is good news. 

The wrong control voltage could be due a problem with the supply of U1 or maybe U2 not working right (either U2 itself or some resistors). Pin 9? and 5   (output to differential amplifier) of U2 should already show the result of the phase comparison. So one should see about the right currents and a change with phase shift.

[precaud]

Thanks for the detailed explanation, rf.

Code: [Select]

  A1 = cos [(ωLO – ωRF)t – (ØLO – ØRF)]
With two equal frequencies applied to a balanced modulator (used as a phase detector), the IF port difference term is DC and related to the phase angle between the two inputs.

That part makes sense.

The IF output will be maximum positive at 0 degrees (cos 0 = 1), maximum negative at 180 degrees (cos 180 = -1), and zero at 90 degrees (cos 90 = 0). The natural tendency of the IF DC output is to drive the controlled element in the direction that will satisfy the A1 equation.

That will take further study.

Now, apply this knowledge to the scope photo. When both signals are present, the differential amp output should be DC. But there's a triangle wave at the input frequency. This implies one of the two inputs to U2 is missing, insufficient amplitude or U2 is defective.

Agreed. I'm pulling U2 and will check all components around it and the diff amp for added confidence.

Thanks again for the details. I've never looked into mixer theory, its interesting stuff.

[precaud]

I removed one leg of enough parts to be able to test all the passives around U1 and U2. Everything measured well within tolerances.

That pretty much left the 1496 as being the problem. So I installed yet another one. Hooked up the probes to watch the waveforms in and out of the phase shifter and monitor the DC at the mosfet gate, and expected to see it working properly on powerup. But no. Same old story. Nothing had changed. Moments like this deserve at least a few cuss words.

After which I probed around the 1496 to see wtf was causing the triangle wave output. And I find over 5VDC on one of the inputs. None to speak of on the other one. The schematic says, C21 should be blocking this. Measured the DC on the other side of C21, and it was the same. C21 has measured fine with no DC on it, and had basically gone short with 5V on one side.

See pic below for the cap and the schematic, including a correction. (TP3 is actually right at the 1496 input and not on the trace to the modulator stage).

C21 is your basic junk ceramic 100nF 50V cap. The manual doesn't say, but given its size, I'd guess X7R (or worse). There are nearly 20 of these things on this board, most of them for local power supply decoupling. I'm tempted to replace them all. Why are they using such a poor-quality cap at such a critical place in the signal path? Wouldn't a film type be better for interstage?

I have some 100nF Y5S which have proven to be stable performers over the years so I replaced C21 and C4 with one of them. Powered the unit up, and saw two waveforms 90º apart on the scope, and -7V or so on the gate of Q10. Finally!

After a couple minutes warmup, it passed self-tests in both open and short modes. It successfully did open and short compensation with the test fixture installed. I then tested a number of hi- and lo-Z components over the entire freq range. It's working!!

It is quite possible that this bad ceramic cap was the major problem with this board all along, though the jury is out on the JFETs.

Thank you guys for your help sorting through this.   

Next I'll install the GPIB and DC offset boards and make sure they work. And then go through the adjustment procedure and do as much as I can without the standards. Making a set of 4-terminal standards might be a good project at some point.

[vtp]

Excellent, glad you finally found the reason.

That Murata blue ceramic is not exactly the worst choice for that position, X7R is fairly temperature stable whereas worse ceramics like Y5 may lead to temperature related issues. There is also R19 to consider so you may want to have the DC-blocking capacitor there to be a good one.

I have seen that same Murata blue go short before, ahem, I did tell you to check the ceramics, did'n I...   Mine was in a 3577A converted B and it was pulling one rail down. I had to remove quite a lot of stuff to get to that one, just like you did now. Those caps have been made gazillion a year and even with sub-ppm level failure rates one pops out every now and then.

If you grind that cap open you will find inside a today's normal SMD cap with leads welded to it and then dipped in epoxy. SMD is actually a cost "improvement" where those flexible leads and protective dipping have been left out.

Making standards for calibration is something I have been considering too. The difficult one would be capacitive standards, others are fairly easy and have good documentation available, see 16074A.

[precaud]

Excellent, glad you finally found the reason.

It was bound to happen sooner or later... we had the bear in a corner...

That Murata blue ceramic is not exactly the worst choice for that position, X7R is fairly temperature stable whereas worse ceramics like Y5 may lead to temperature related issues. There is also R19 to consider so you may want to have the DC-blocking capacitor there to be a good one.

What would you suggest to be a good one? Isn't a high-quality film a better choice for DC blocking? I have never liked using ceramics in the signal path, with capacitance and ESR changing as DC bias changes. And this thing has quite a few of them, even 470nF and 1uF.

BTW, the Y5S temp stability is only slightly worse than X7R:
http://iopscience.iop.org/article/10.7567/JJAPS.24S2.1027

But C and ESR are both more stable with delta DC.

BTW2, the HP parts list describe this 100nF cap as " +80 -20% " which is more like a Y5V...

I have seen that same Murata blue go short before, ahem, I did tell you to check the ceramics, did'n I...

Yes, and I DID check them, just not with DC bias...

Mine was in a 3577A converted B and it was pulling one rail down. I had to remove quite a lot of stuff to get to that one, just like you did now.

Interesting. That will be one of my future projects, reviving a 3577A. I know who to call now 

Those caps have been made gazillion a year and even with sub-ppm level failure rates one pops out every now and then.

OK, I won't do wholesale replacement of them, then.

If you grind that cap open you will find inside a today's normal SMD cap with leads welded to it and then dipped in epoxy. SMD is actually a cost "improvement" where those flexible leads and protective dipping have been left out.

That makes sense.

Making standards for calibration is something I have been considering too. The difficult one would be capacitive standards, others are fairly easy and have good documentation available, see 16074A.

Yes, the cap standards are the hard ones. For my needs a full set of R standards is not necessary, I'm mostly interested in the lower-Z end of things. And the HP LCR cal procedures I've seen only use open, short, and 2 or 3 others at most. The open you can sub short BNC cables for.

Getting back to 4275A territory... an odd idiosyncrasy of it (and the 4274A) is, the DC bias option can not be operated from the front panel, and is only controllable via GPIB. I realized this morning why that is. The code to support it is on the GPIB option ROM! There wasn't room for it in the 16kB address space allocated for program code in the memory map. (Can you imagine, the entire operating system, complex math package, everything, in 16kB?) So DC bias is not for bench use, only an ATE function. Too bad...

This instrument was really an amazing piece of engineering in its day. Kudos to the Yokogawa engineers.

[GerryBags]

Thoroughly enjoying this saga, Precaud. 

Isn't it funny how far engineers used to be able to make 16kb stretch? When I started out on using computers for design work, quite a while after this beast was made, 16kb was the standard size for a true-type font file. Now I think they're all ten times that at least. Flabby code caused by the use of building blocks, with the creation of new basic elements becoming less frequent and combinations of basic structures becoming building blocks themselves. Gradually, knowledge of how to construct the most basic elements becomes more scarce and, before you know it, half of the gains of forty years of Moore's Law are flushed down the loo.

[precaud]

Thoroughly enjoying this saga, Precaud. 

Thanks Gerry, better drama than a TV soap, I'd say 

Isn't it funny how far engineers used to be able to make 16kb stretch? When I started out on using computers for design work, quite a while after this beast was made, 16kb was the standard size for a true-type font file. Now I think they're all ten times that at least. Flabby code caused by the use of building blocks, with the creation of new basic elements becoming less frequent and combinations of basic structures becoming building blocks themselves. Gradually, knowledge of how to construct the most basic elements becomes more scarce and, before you know it, half of the gains of forty years of Moore's Law are flushed down the loo.

It's true. Cheap memory, GHz cpu's, and 64-bit address busses and size no longer matters. My son is a CS guy working with large data structures, and when he looks at my past coding (much of it of Z80), and the OS's of instruments of this era, its almost unreal to him. Concise and compact mean nothing in his world. Different times.

[vtp]

Sorry, I missed your point about the cap going short (ohmic?) under DC-bias. What does your multimeter show in the ohms range if you measure it?

To find out all simple issues I typically first visually inspect boards for any obvious faults, then go over each component with multimeter, fuses, resistors, ceramics and tantalums in ohms range and then diodes and transistor PN-junctions in diode tester setting. Most of the simple stuff gets caught this way. It is a kind of challenge to fix a test equipment only with Fluke 87. Last one I did completely that way was a 3458A and that even included debugging serial communications (shift registers).

Getting back to 4275A territory... an odd idiosyncrasy of it (and the 4274A) is, the DC bias option can not be operated from the front panel, and is only controllable via GPIB. I realized this morning why that is. The code to support it is on the GPIB option ROM! There wasn't room for it in the 16kB address space allocated for program code in the memory map. (Can you imagine, the entire operating system, complex math package, everything, in 16kB?) So DC bias is not for bench use, only an ATE function. Too bad...

Manual DC-bias control is a separate device, 16023B. It connects to amphenol connector at the back of the instrument where the connector has been brought out with a kind of extender board from the bias supply. At least that's how it is in my 4274A. I think the DC-bias option is just one board + the extender for rear panel connector. In 4284A it is two different boards compared to standard unit. 4274A is in any case more usable than 4284A in my opinion but that's a different story.

[precaud]

Sorry, I missed your point about the cap going short (ohmic?) under DC-bias. What does your multimeter show in the ohms range if you measure it?

Out-of-circuit with no DC bias, 55 Ohms.

To find out all simple issues I typically first visually inspect boards for any obvious faults, then go over each component with multimeter, fuses, resistors, ceramics and tantalums in ohms range and then diodes and transistor PN-junctions in diode tester setting. Most of the simple stuff gets caught this way. It is a kind of challenge to fix a test equipment only with Fluke 87. Last one I did completely that way was a 3458A and that even included debugging serial communications (shift registers).

Challenge, indeed!  I'd say that is close to my typical procedure... unless I'm navigating in completely foreign waters, then I follow the manual.

Manual DC-bias control is a separate device, 16023B. It connects to amphenol connector at the back of the instrument where the connector has been brought out with a kind of extender board from the bias supply. At least that's how it is in my 4274A. I think the DC-bias option is just one board + the extender for rear panel connector.

Yes, but that misses my point. Why is a separate device (16023B) even necessary? Why aren't the controls on the front panel? Because of 1. the way they allocated (and addressed) memory, and 2. memory-mapped I/O.

Attached is the memory map of the 4274A and 4275A. As you can see, 16kB is allocated each for ROM, I/O ports, option ROM, and RAM. The upper two bits of the address determine which "device" is read from or written to.
Program code and all fixed data constants get the top 16kB. That's all.
Next 16kB goes to IO devices. How many actual addressable IO ports are needed? Maybe 2-3 dozen? That's over 16,050 addresses wasted.
Then the option ROMs. How big are they? 1kB each for GPIB and special freq option. Another 14kB wasted.
Last 16kB is RAM. How much RAM is there? 3kB if the battery-backed option is used. That's over 13kB of addressable space wasted.

You see, so much wasted memory space, and no extra room IN PROGRAM ROM SPACE for the code to service a couple more buttons and control the DC bias board.

The 4276A came a couple years later. They learned the lesson. Went with a Z-80 with register-based I/O. Instantly you actually have the entire 64kB to work with.

In 4284A it is two different boards compared to standard unit. 4274A is in any case more usable than 4284A in my opinion but that's a different story.

I've never compared the two, but I wouldn't own a 4284A, because there is no service manual / schematics for it.

PS - I was looking forward to your answer to the ?? about the DC-blocking caps... (or anyone else's thoughts). The more I think about it, the more I'm inclined to go with a polyprop film.

[vtp]

Yes, but that misses my point. Why is a separate device (16023B) even necessary? Why aren't the controls on the front panel? Because of 1. the way they allocated (and addressed) memory, and 2. memory-mapped I/O.

Yes, perhaps they first did the meter and then got the idea that it would need DC-bias too... Too late to change the front panel or other boards. In 8662A they did SMPS transformer pin out in mirror and had to fix it in layout - it's quite obvious to see what happened by looking at the layout.

I've never compared the two, but I wouldn't own a 4284A, because there is no service manual / schematics for it.

Ahh, that's kind of saying "I give up!" After fixing equipment using service manuals it gets boring. The next obvious challenge is to get equipment without service manuals or block diagram only. That is why I got the 4284A, but it has been a disappointment, I found the failure (although I had to resort to an oscilloscope) and its construction is substandard IMHO.

PS - I was looking forward to your answer to the ?? about the DC-blocking caps... (or anyone else's thoughts). The more I think about it, the more I'm inclined to go with a polyprop film.

I would have dropped in an X7R 100nF ceramic and called it a day. Too much thinking is dangerous and leads to gold deposited teflon film in hermetic can being in there. But film capacitor probably is fine as long as it works ok at 10 MHz too which it probably does. Use your now functioning 4275A to compare ceramic and film cap properties up to 10 MHz.

[precaud]

Ahh, that's kind of saying "I give up!" After fixing equipment using service manuals it gets boring.

A little eevblog bravado, eh?

That is why I got the 4284A... its construction is substandard IMHO.

I wasn't impressed with that aspect either.

Use your now functioning 4275A to compare ceramic and film cap properties up to 10 MHz.

My thought exactly. 

Now Witness the power of this fully armed and operational battle station! Loafing along at 2MHz...

[precaud]

For anyone else repairing the cpu board of their 4275A, here are the ROM images.

As explained in the .TXT file, these images are for cpu boards with part number 04275-66519 and lower.
The U10 code is used with A11 (HPIB) boards with part number 04274-66522.

For cpu boards with suffix -66529 and later, or for U10 code for use with HPIB boards with suffix -66551, use the images available for download in the files section of the Yahoo HP/Agilent Users Group.

[precaud]

I went through the adjustment procedures today, did everything except the range resistors (which requires 4-terminal R standards). The cal procedures are pretty straightforward. A few adjustments were a ways out but I encountered no problems bringing everything to within specs. The power amp board was out of spec and couldn't be adjusted in. I found a 33uF lytic going open, it was sitting right above a heat sink and cooking. Replacing it brought that whole board into adjustment.

I then took a number of different components and compared them between the 4275A and a Wayne Kerr 6425. The highest freq they have in common is 200kHz so I compared them at 10kHz, 100kHz, and 200kHz.

The differences were insignificant, mostly the result of the small lead length differences imposed by their respective fixtures.

The only head-scratcher I encountered was a difference in the way they computed the capacitance value of 68uF 'lytic at 100kHz. Both instruments measured the impedance and phase the same, yet computed quite different C values from it. No biggy for me, I work mostly with raw Z/phase values anyway.

You may recall I mentioned early on how the HP 4192A has low-impedance limits, below which it simply blanks the phase display when the measured value is below it (50 mOhms). The 4275A has a similar "feature". It blanks the phase display for all measurements below 10mOhms. You can measure phase at 10.2mOhms but not at 9.8mOhms. Not a big deal for me but worth mentioning.

This weekend I'll compare its results at higher freqs to those using a VNA. So far I'm very pleased with it. It's a very nice instrument.

[precaud]

Use your now functioning 4275A to compare ceramic and film cap properties up to 10 MHz.

After looking at the 100nF films caps I have here, I decided to skip them. Their larger package size and hence longer leads puts their self-resonant frequency well below 10MHz, which is not desirable in this situation.

I modified one of my programs for another HP LCR meter to control the 4275A via GPIB. Wrote routines so it measures C/ESR from either Z/phase or R/X data (the latter is preferable, it bypasses all of the 4275A's range limitations), and plots the results.

This compare is of two different 100nF ceramic formulations. The X7R is the 100nF blue chiclets used throughout the 4275A, both for PS bypassing and DC blocking. The Y5S is a 100nF Murata disc that I got a few years ago. After getting some and seeing how good they measured (up to 100kHz back then), I bought a few hundred to have around.

If you want to make yourself sick, put the X7R in the bridge and watch the capacitance and DF change with time. At 100kHz with 1 VAC drive, it took nearly a minute for the value to settle. Change the frequency and watch it migrate again for half a minute. Then add some DC bias and watch the C go down and ESR go up. After this you won't put an X7R in an analog signal path ever again.

The Y5S was much better, settling to final value in <10sec, and showing very little change with freq change or DC.

This test was made after I had already replaced all of the blue X7R's on all analog boards with the Y5S's (except those used for PS decoupling). It was made with conditions similar to what they see in the instrument in the decoupling role: 1 VAC test level with 5V DC bias.
As you can see, the ESR of the X7R is much worse than the Y5S across the board, by a factor of 10 at 400kHz and worsening below that.
I had to go thru some of the cal procedures again after changing them.
It may be all in my head, but the instrument readings seem more stable, drift less, with the new caps in.

Next I want to take a close look at the calibration steps ( all two of them) that require the standard resistors and capacitors. They are used to calibrate the range resistors.

[vtp]

Interesting findings.

Only explanation to your stability measurements under bias I can think of is that your old Y5S is a single disc capacitor and the X7Rs are MLCC. Today Y5S is only used in line rated X/Y-classified safety capacitors and they are single layer discs.

BTW, Q10 is a depletion mode MOSFET, it is the base/substrate bias that pushes its treshold voltage to around zero volts or below from clearly positive value. Figured this out some time ago.

[precaud]

Only explanation to your stability measurements under bias I can think of is that your old Y5S is a single disc capacitor and the X7Rs are MLCC.

Are you suggesting that MLCC of any class perform worse (stability-wise) than a disc under conditions of changing voltage/freq across them?

Today Y5S is only used in line rated X/Y-classified safety capacitors and they are single layer discs.

Mine are collector's items, then   

These ceramic cap classifications all have to do with usable temperature range and stability vs temp change. I found this chart of capacitance change vs applied DCV:


Even with the cheaper electrode mat'ls, there is not much impact on capacitance at 5VDC. This agrees with what I found. So the impedance change is all in the increasing ESR.

All of which says X7R sucks for passing AC. Unless your design calls for an impedance modulator, get them out of the signal path for critical applications.

[mrf245]

Hello, can anyone provide a download link for HP4275A service manual in high quality?
I found service manual in KEYSIGHT website, but its misty in ERROR check table and schematic. Many appreciate.

[lotsmorebetter]

Hi to all who are reading this.
I am an audio hobbyist who has enjoyed the use of an HP 4275 LCR meter over the years. It has been great in every way that one would expect. Lately, not so. When I got Error Message 4, I sent it in for repairs and they wanted the price of a new one to repair it. Impossible.
I need someone from this community (preferably in the US, but I would consider Canada too) who has had some experience in repairing them and who will not charge the impossible to repair it.
Interested? Please send info to me either through this site or to my email address directly.
Thanks in advance.

[Dany]

Hello,
i have a lcz meter mod. HP 4274A not working.
I would need to have the 32K ROM image marked 1818-1137 (A9U7).
I'm also willing to donate for anyone who helps me or who gives me directions where to download it
Thank you
Daniel

[_Wim_]

Hello,
i have a lcz meter mod. HP 4274A not working.
I would need to have the 32K ROM image marked 1818-1137 (A9U7).
I'm also willing to donate for anyone who helps me or who gives me directions where to download it
Thank you
Daniel

I believe the 4274A and 4275A use the same firmware. This would mean you can use the ROMs posted here: https://www.eevblog.com/forum/repair/the-repair-from-he!!-hp-4275a-lcr-meter/msg1490586/#msg1490586

[Swake]

Thanks for digging this thread up from the past. It was a vert interesting read! Many things to learn from.

[Dany]

Sorry, in part it is true only for the 32K U1, U3, U5 and U10 rom for the U7 rom there is a difference in fact in the HP4275A it is marked 1818-1138 while in the HP 4274A it is marked 1818-1137 I need the image of the latter
Thank you
Daniel

[GRMPhD]

Hello,
i have a lcz meter mod. HP 4274A not working.
I would need to have the 32K ROM image marked 1818-1137 (A9U7).
I'm also willing to donate for anyone who helps me or who gives me directions where to download it
Thank you
Daniel

Wow, what a coincidence that I am working on my faulty 4274A only a couple days after you and came across the same thread!

I desoldered and dumped all of my ROMs and posted them in the attachment to this reply.

My 4274A is not working so I can't guarantee that my ROMs are good, but if I verified them against the dumps already posted in reply #48 by precaud and they do agree for U1, U3, and U5. So potentially my U7 and U10 are also ok, but like you, I was unable to find any dumps of U7 or U10 from a 4274A online to verify that mine are OK. I'm not sure why the ROMs posted earlier are 4k. Looking over the service manual it appears that there are only 11 address lines (2^11 = 2k) connected to the ROMs so my 2k dumps should be all that the instrument is expecting. I dumped them with my MiniPro programmer assuming they are a type 2716 EPROM. I know this is an incorrect assumption, but without being able to decode the HP part numbers and see what the chips actually are I'm not sure what else to try. Hopefully, if you are able to get yours working using my ROMs then I can at least rule out my ROMs being the problem.