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$r + 4C + 1 FPGA == Radio Challenge
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Topic: $r + 4C + 1 FPGA == Radio Challenge (Read 2339 times)
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antti
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$r + 4C + 1 FPGA == Radio Challenge
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March 29, 2017, 07:05:40 am »
As subject, the challeng is to use 8 passive components, 4 x R, 4 x C and one FPGA (any Xilinx 7 series is ok) to create a Radio receiver with frequency coverage over 500mhz.
Challenge announcement at Xilinx blog
https://forums.xilinx.com/t5/Xcell-Daily-Blog/Antti-s-Trenz-Challenge-Build-a-500MHz-radio-receiver-with-4/ba-p/757338
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daveshah
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Re: $r + 4C + 1 FPGA == Radio Challenge
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Reply #1 on:
March 29, 2017, 08:50:34 am »
What a funny coincidence, given my project only a couple of days ago
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antti
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Re: $r + 4C + 1 FPGA == Radio Challenge
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Reply #2 on:
March 29, 2017, 09:01:18 am »
Yes, I read your GTx but honestly, I found your post LATER, and its totally different approuch!
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daveshah
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Re: $r + 4C + 1 FPGA == Radio Challenge
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Reply #3 on:
March 29, 2017, 10:20:46 am »
I wasn't implying anything - just thought it was interesting. This certainly looks like a better approach for lower frequencies and will be much more sensitive I'm sure. I'm definitely going to have a play with it as I'm interested in SDR type stuff.
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antti
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Re: $r + 4C + 1 FPGA == Radio Challenge
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Reply #4 on:
March 29, 2017, 10:31:40 am »
yes its pretty cool, the technical details will get explained and published as soon as the challenge is completed..
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$r + 4C + 1 FPGA == Radio Challenge
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