EEVblog Electronics Community Forum
Electronics => RF, Microwave, Ham Radio => Topic started by: jgalak on December 04, 2017, 02:00:47 pm
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I'm pretty new to both electronics in general and radio work specificially, and my current hobby project involves working on some low power transmitters, currently on the 2m band and eventually on the 70cm band. The transmitters will be on custom-printed PCBs that I'm designing. I'm wondering how critical it is to use proper impedance traces at those frequencies when dealing with small boards (lets say less than 2" PCB trace before it goes into a coax connector). These are low power, so I'm quite concerned with attenuation of signal. Is it worth the trouble to do microstrip and/or CPWG for this, or can it be ignored at these frequencies and lengths of trace?
(And before someone asks, yes, I'm planning on testing the heck out of it into a dummy load before anything goes on the air)
Thanks.
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2" of thin trace will have about 30 ohms of inductance at 2m. That's more than enough to cause horrible performance from an antenna
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Transmission lines are needed for long runs and are acceptable where the impedance is already 50 ohms. Otherwise, the mismatch looks capacitive causing problems for nodes which are not 50 ohms.
You can see this in RF designs where the ground plane is cut away from high impedance nodes.
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The transmitted signal is1 - |(Z2-Z1)/(Z1+Z2)|. So if a nominal 50 ohm node feeds a 25 ohm line feeding a 50 ohm load, the load only receives 4/9 of the output. (two reflections, (2/3)**2)
That's the high frequency approximation. As things get small so relative to wavelength the answer changes. Small is generally much less than 1/4 wavelength.
So you can *probably* ignore it at 2 m but not a 70 cm.
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@rhb, I have the feeling you were a bit too fast typing the equations.
At 2m and 70 cm it should not be too critical. As long as you use a groundplane.
With practical linewidths it almost impossible to get an impedance outside of the 25 to 100 ohms range.
For 50 ohms on FR4, as a rough rule of thumb, just keep the linewidth at 2x substrate height.
Dont think about using GCPW for longer lines (in wavelengths). This mode does not exist. It is a combination of a microstrip mode (between the line and the ground underneath) and a CPW mode (between the line and the adjacent grounds). the CPW mode is almost impossible to enforce with PCB processes, since it requires a 10:1 linewidth/spacing ratio for 50 ohms. The impedance will therefore always be dominated by the micrstrip mode. Just keep the adjacent grounds > 0.7 substrate height away.
The problem lies in the fact that both modes have different propagation velocities. The only way around this is by applying lots and lots of vias next to the line, to couple both modes.
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Dont think about using GCPW for longer lines (in wavelengths). This mode does not exist.
Who are you to tell electrons where they can and can't go? :P
It is a combination of a microstrip mode (between the line and the ground underneath) and a CPW mode (between the line and the adjacent grounds). the CPW mode is almost impossible to enforce with PCB processes, since it requires a 10:1 linewidth/spacing ratio for 50 ohms. The impedance will therefore always be dominated by the micrstrip mode.
So?
And planar diff pairs are dominated by normal mode impedance, but people still use 'em.
Why is that? :)
Just keep the adjacent grounds > 0.7 substrate height away.
The problem lies in the fact that both modes have different propagation velocities. The only way around this is by applying lots and lots of vias next to the line, to couple both modes.
Just keep the adjacent grounds ~minspace away (say 10 mils), and ensure at least a trace's width pours inbetween separate traces. The ground serves more as shield than as an impedance modifier.
For typical PCB fab dimensions, for the same trace width, CPW is only about 10% lower impedance than microstrip. It's not much savings on trace width. And strictly speaking, it's a net loss on layout space, because of the extra ground trace width + vias (if used) + clearances. Whereas you could route a bus of microstrip in less than half the space (if you don't care about crosstalk -- okay for LVCMOS buses, probably not so hot for UHF signals).
Microstrip itself BTW has two different modes, due to the air above the trace versus the dielectric below the trace. Vias improve shielding between traces, they don't do anything for velocity.
If you require low dispersion over long traces, you can use stripline inside a multilayer board. You still have the problem of loss if you use FR-4, or you can upgrade to Rogers laminate.
For general radio tech at UHF, FR-4 and microstrip and CPW are more than fine (and shield cans or stripline where extreme isolation is needed).
Tim
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Based on the discussion above, I'm even more confused :)
I'm planning on using Seeedstudio's Fusion PCB. Standard stuff - FR4, 2 layers, 1.6mm board thickness, 1oz copper.
Using this calculator: https://www.eeweb.com/tools/microstrip-impedance (https://www.eeweb.com/tools/microstrip-impedance) and plugging in Trace thickness of .035mm (1oz), substrate height of 1.6mm, and substrate dialectirc of 4.3, I get the needed trace width of 3 mm. Which is huge on my little 30 mm by 25 mm board. Not to mention way bigger than the IC pads and even the SMA edge launch connector pads.
After searching here, I ran across this article on CPWG: http://analoghome.com/articles/an004.pdf (http://analoghome.com/articles/an004.pdf) which suggests a trace width of .032 inch and a gap of .006 inch. That's way better, but for Fusion min distance between trace and copper pour is 8mil. So I then found this calculator: http://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm (http://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm)
Entering dialectric of 4.3, width of gap of .2 mm (8 mil), and thickness of dielectric of 1.6mm, I find that width of track of 1.36mm gives me 50 Ohms. That's much more manageable, even with stitching vias places around the trace. It fits nicely with the SMA connector trace, and is easier to neck down to the IC pad.
Am I missing something? CPWG seems like the way to go rather than microstrip.
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Nice, you discovered Chemandy. Good calculators there. :)
Yes, fat traces. As you've discovered, even with ground fill, trace width is on par with substrate thickness. The real winner is thinner substrate, whether 40 mils (or thinner) 2-layer stock, or 4-layer (inner ground plane with usually 10-15 mils of substrate on top). Then you can connect without necking.
And, impedance being what it is: you can compensate for short necks, to some extent, by following that with an overly fat trace of about the same length. (Which, in turn, can be followed by..) Now, the precise geometry necessary to fully compensate the impedance discontinuity -- up to the maximum possible flatness * bandwidth -- is nontrivial to calculate (you're building a lowpass filter, actually), but for hand-waving purposes, it's enough to note this. So, as a filter, you're adding series inductance (necked down trace), which causes a bandwidth reduction (and consequent power mismatch, if the filter bandwidth is cutting into the signal bandwidth). A parallel capacitance (fat trace) can "peak" that up, by about a factor of 2.
Or you can simply use, say, 100 ohm traces on board, and add impedance matching networks wherever you need to connect with the outside world! (This might not be a beginner option, as most appnotes and components are intended for 50 ohm systems, and adapting components may be tricky.)
Tim
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Going to 100 Ohm traces does seem too complicated - the chip wants 50 Ohm.
I'm attaching an image of the top copper. My concern is the three CLK lines I'm trying to get out of this chip. The trace dimensions are set up as per the CPWG calculator above. They simply take the CLK lines out of the chip and into SMA edge connectors. The bottom copper is a solid ground plane except for one trace running through it. That trace is not under the CLK lines, and there are stitching vias between them.
My concern is the necking - there is so much difference in trace width vs. solder pad size, I'm not really sure how well that will work. My current thought is to just build the board and see how it performs, unless there are major issues here....
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CPWG as a transmission line is a bad idea.
However if you keep lines short (in wavelength), like in your layout, the transmission mode fields cannot properly form.
Instead a better way is to look at the system from a lumped kind of view. As long as you keep as a first order approximate the capacitance balanced, the impedance will remain constant. The inductance will be a second order effect. The proximity of the 'CPW ground' is not really a transmission mode effect, but merely to compensate for the missing 'microstrip capacitance'
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Dont think about using GCPW for longer lines (in wavelengths). This mode does not exist.
Who are you to tell electrons where they can and can't go? :P
It is a combination of a microstrip mode (between the line and the ground underneath) and a CPW mode (between the line and the adjacent grounds). the CPW mode is almost impossible to enforce with PCB processes, since it requires a 10:1 linewidth/spacing ratio for 50 ohms. The impedance will therefore always be dominated by the micrstrip mode.
So?
And planar diff pairs are dominated by normal mode impedance, but people still use 'em.
Why is that? :)
People are always focussed on differential pairs. Like you say it is dominated by the microstrip impedance, so no need to keep the lines strictly in pairs. The only benefit differential lines have is that (non RF) people usually don't care about ground. Slots will be cut in ground, power planes, etc. Using differential lines there will always be a virtual ground in the middle, causing in general more success for people that do not think about transmission line.
However in microwave layouts, at frequencies where the lenghts are much larger than a wavelength, you will almost never see a differential line being used as a transmission line. This has the same reason as GCPW, a differential line will also support two transmission modes. (BTW I am a microwave engineer, having designed circuits up to 120 GHz)
Just keep the adjacent grounds > 0.7 substrate height away.
The problem lies in the fact that both modes have different propagation velocities. The only way around this is by applying lots and lots of vias next to the line, to couple both modes.
Just keep the adjacent grounds ~minspace away (say 10 mils), and ensure at least a trace's width pours inbetween separate traces. The ground serves more as shield than as an impedance modifier.
Agree, as long a the lines are short. Like in my other post, this is more a lumped effect.
For typical PCB fab dimensions, for the same trace width, CPW is only about 10% lower impedance than microstrip. It's not much savings on trace width. And strictly speaking, it's a net loss on layout space, because of the extra ground trace width + vias (if used) + clearances. Whereas you could route a bus of microstrip in less than half the space (if you don't care about crosstalk -- okay for LVCMOS buses, probably not so hot for UHF signals).
Microstrip itself BTW has two different modes, due to the air above the trace versus the dielectric below the trace.
Agree, but these are not independant. These are strongly coupled, hence they invented the name quasi-TEM. You do not have to enforce the coupling between modes in any way.
Vias improve shielding between traces, they don't do anything for velocity.
If you do not use via's from the CPW ground to the microstrip ground, then the wave velocities of the microstrip mode and the CPW mode will definitely be different. If you do not care about isolation, you will still need to stitch along the line, to keep the two propagation modes strongly coupled. (Not to mention the slotline modes)
If you require low dispersion over long traces, you can use stripline inside a multilayer board. You still have the problem of loss if you use FR-4, or you can upgrade to Rogers laminate.
For general radio tech at UHF, FR-4 and microstrip and CPW are more than fine (and shield cans or stripline where extreme isolation is needed).
Tim
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I often do amateur radio VHF/ UHF work with boards like you describe. Here's the recipe I use, right from my notebook. These were obtained using the AppCAD impedance calculator for coplanar waveguide with ground. This has always worked fine in my projects:
FR4 PCB 2 layer, 1.6 mm thickness, 1 oz. copper
CPWG, using solder mask on top
Trace width: 35 mils, Clearance to adjacent ground plane: 8 mils
This gives an impedance of 52.6 ohms. Adjust down by 95% to 98% due to the solder mask to get 50.0 to 51.5 ohms.
Trace width: 30 mils, clearance: 7 mils, 53.0 ohms, adjust for solder mask to get impedance: 50.3 to 51.9 ohms
CPWG, without solder mask:
Trace width: 35 mils, clearance: 7 mils, impedance: 50.4 ohms
Trace width: 30 mils, clearance: 6 mils, impedance: 50.2 ohms
It seems many designers recommend pulling back the soldermask. I usually don't. I calculated the adjustment factor for the soldermask using standard formulas and soldermask material specs obtained from a PCB manufacturer and then checking my results against others I had seen published. They all were in the 95% to 98% range. Of course I use vias in the ground plane along the gap. Sometimes I neck down the trace with a smooth transition. Sometimes I don't. In the layout give top priority to RF paths and keep them short and straight, if possible. At the wavelengths you are using I don't think you'll have any issues if you use dimensions in this ballpark.