Matching is bad for noise?

[TheUnnamedNewbie]

So, I am studying an RFIC course for my masters in EE, and in the slides the professor makes a claim I find a bit odd and I find it hard to believe since I would imagine this be mentioned more often if it were the case.

His claim is that impedance matching is bad for noise when you have a IC LNA that is connected to the antenna.

His claim (and it makes sense) is that our LNA is a voltage-to-current amplifier (CMOS) and not a power-to-current. Matching optimizes power transfer, but we don't care about that, all we care about is that the voltage at the gate of our LNA transistor is as big as it can be. If we terminate with a 50 ohm resistance, we add noise with that resistor AND lower the voltage swings at that node. If we leave unterminated, we don't add noise and have the biggest swings we can get (assuming the gate-to-ground impedance at that frequency is large compared to 50 Ohm).

What he says makes sense, but I wonder if it is really true, and if so, why is it not a more common thing that is talked about? The RF and microwave people I know want to always match to get the best performance, and now this professor is suddenly claiming it is not the right way to go. What am I missing here? (I don't want to suggest the professor is wrong - I'm just confused as this is contradicting what I thought I knew)

What I can think about is a) our antenna might not at all perform well if it is left unterminated and b) we also need to think about reflections and such adding unwanted signals and increasing the noise floor.

[T3sl4co1l]

There are many kinds of matching.  Normally, noise match is near gain or power match, but not exactly.

Noise matching is critical for the input stage, but unimportant for the power stage.  If everyone else is worried about power match, they're either taking the close-enough approach, or missing precious dB of noise floor.

Note that, with a higher Thevenin impedance on a CMOS node (the unterminated vs. with-load-resistor case), the bandwidth also changes.  More specifically, the gain and bandwidth change, but the gain-bandwidth is about proportional.

Tim

[ConKbot]

Every bit of loss before the LNA raises the noise floor by the amount of loss. So a 0.3db nf LNA with a matching network that has 1db of loss will come out to a nf of 1.3db. If your loss in a matching network is higher than the mismatch loss of it not being present, then you aren't helping more power go into the amp itself. And being right at the noise floor you're fighting for every last bit of energy to get stuffed into your gain element. If you're adding a resistive match to transfer more energy out of the antenna, just to burn it up in the resistor, unless it's serving some other purpose, why even bother?

Getting an amplifier set up is an exercise in compromise. (Gain, noise figure, bandwidth, input/output matching, current draw, PAE, p1db, linearity) make sure you're compromising in the right areas for the task.

As Tim said above, max gain/power is usually close, so once the first order approximation is out of the way you can work on the finer details.

[KJDS]

I've only ever looked seriously at matching for noise on pHEMTs. Usually for best noise figure then you'll only end up with a few dB of return loss. You'll probably also end up with an oscillator, but that's usually more likely when tuning for max gain.

[jimmc]

If an amplifier is impedance matched to a source by conventional means, the noise figure cannot be less than 3dB.
This occurs because the source EMF is reduced by 6dB whereas the noise voltage is only reduced by 3dB (thermal noise voltage is proportional to SQRT(R)).

Low noise and impedance matching can be achieved by using lossless feedback, the best known example is by Norton.
The reason that this works is that the input resistance obtained by lossless means does not generate thermal noise.
A quick Google of  "lossless feedback amplifier" will give details.

Jim

[G0HZU]

His claim (and it makes sense) is that our LNA is a voltage-to-current amplifier (CMOS) and not a power-to-current. Matching optimizes power transfer, but we don't care about that, all we care about is that the voltage at the gate of our LNA transistor is as big as it can be. If we terminate with a 50 ohm resistance, we add noise with that resistor AND lower the voltage swings at that node. If we leave unterminated, we don't add noise and have the biggest swings we can get (assuming the gate-to-ground impedance at that frequency is large compared to 50 Ohm).

What he says makes sense, but I wonder if it is really true, and if so, why is it not a more common thing that is talked about?

I think he is describing the case for a particular type of amplifier. For example, a dual gate MOSFET amplifier will have a very high input impedance at gate 1 and such an amplifier will have a reflection coefficient very close to 1. So the input match is about as bad as it gets.

A crude alternative that uses jellybean parts would be a pair of JFETs arranged in cascode. Both the MOSFET and JFET cascode amplifiers will behave as 'voltage to current' amplifiers with a very high input impedance.

If you drove the JFET cascode unterminated the noise figure for the amplifier might be 3dB despite the awful input match (because it is a voltage to current amplifier with high input impedance). But if you terminated the amplifier input with a shunt 50R resistor the gain in the amplifier would drop by about 6dB and the noise figure would degrade to maybe 8dB or so. But there would be no power reflected back to the source in this case.

why is it not a more common thing that is talked about?

I think there are alternative methods for LNA design that do try and get a decent input match so the example above is best used as a high input impedance buffer amplifier rather than an LNA at a receiver input port. Something like a modern PHEMT LNA can be arranged to have a ~1dB noise figure and a good input match over a useful frequency range. For example, >20dB input return loss and possibly a sub 1dB noise figure over 150MHz-300MHz could be achieved.

[rfeecs]

So, I am studying an RFIC course for my masters in EE, and in the slides the professor makes a claim I find a bit odd and I find it hard to believe since I would imagine this be mentioned more often if it were the case.

His claim is that impedance matching is bad for noise when you have a IC LNA that is connected to the antenna.

His claim (and it makes sense) is that our LNA is a voltage-to-current amplifier (CMOS) and not a power-to-current. Matching optimizes power transfer, but we don't care about that, all we care about is that the voltage at the gate of our LNA transistor is as big as it can be. If we terminate with a 50 ohm resistance, we add noise with that resistor AND lower the voltage swings at that node. If we leave unterminated, we don't add noise and have the biggest swings we can get (assuming the gate-to-ground impedance at that frequency is large compared to 50 Ohm).

What he says makes sense, but I wonder if it is really true, and if so, why is it not a more common thing that is talked about? The RF and microwave people I know want to always match to get the best performance, and now this professor is suddenly claiming it is not the right way to go. What am I missing here? (I don't want to suggest the professor is wrong - I'm just confused as this is contradicting what I thought I knew)

What I can think about is a) our antenna might not at all perform well if it is left unterminated and b) we also need to think about reflections and such adding unwanted signals and increasing the noise floor.

This type of thing is in fact mentioned very often in the study of RF LNA design.  It is a basic fact taught in introductory courses.  The optimum match for noise figure is in general not a conjugate match.

Here is an ancient paper describing how the optimum noise match can be derived from a simple noise model for a two port:
http://ece.vnit.ac.in/people/asgandhi/wp-content/uploads/sites/5/2014/07/Representation-of-Noise-in-Linear-Two-ports-Haus.pdf

The professor's claim as you have represented it doesn't sound quite correct.  What an RF engineer thinks of matching is not sticking a 50 ohm termination at the input.  It is more like inserting a low loss (ideally lossless) circuit at the input to transform the impedance to 50 ohms (or Z0).

You can consider that there are equivalent noise sources present at the input of the device, and how does the input match affect the signal and noise power at the output of the device relative to the input.

Some key words you might search for are "noise parameters" and "gamma-opt".  These are routinely measured for low noise devices and often published in datasheets.

[TheUnnamedNewbie]

thanks for all the replies. In addition to the answers here I have been looking around and I now understand the question better. What I was intepreting the professors claim as is that we don't want to match because then we see higher voltage swing at our device. However, I now understand that it is restive matches specifically that are bad (IE, slap a 50 ohm resistor from gate to ground), because they just add noise. What is often desired is a network that transforms the circuit to appear 50 ohms (or whatever impedance you need) at the input, but doesn't add noise (by building it with noiseless components such as transmissionlines, inductors and capacitors). My misunderstanding of what he was trying to say also explains why I didn't come across it before. That said, his slide with a 50 ohm resistor to ground doesn't help here...

I now understand this concept somewhat better. 

[jimmc]

Even using a lossless matching network to impedance match the amplifier to the source will result in a noise figure of at least 3dB since the transformed resistive component of amplifier input will have the same thermal noise as the source (if at the same temperature).
In general matching for lowest noise figure will not result in impedance matching. I think that this maybe what your prof is hinting at.
There is an on-line calculator here http://aaronscher.com/Gain_NF_calculator/gain_NF_calculator.html which will demonstrate the effect for a perfect amplifier - the greater the impedance mismatch the lower the noise figure.
(Set the gain to 1000 or more to minimise the noise contribution of the output resistance.)

If the amplifier must be impedance matched to the source then only way round this limitation is to use lossless feedback which can synthesise a 'virtual' resistor without thermal noise.
Or cryogenically cool the amplifier!

Jim

[G0HZU]

In addition to the answers here I have been looking around and I now understand the question better.

I think your professor was simply just comparing the merits of having a terminated vs an unterminated input at the high Z "voltage to current amplifier". I think you maybe read too much into it and maybe a few people on this thread did too...

[G0HZU]

If we look at the example I gave using the two JFETs in cascode, it is possible to improve the noise figure by placing an L network at the input. This would step up the voltage even higher but at the expense of bandwidth. However, the noise figure should improve to maybe 1.5dB. The downside would be that the input match would still be poor. One way around this would be to make two identical amplifiers with the L network and then fit them in between a pair of -3dB 90deg hybrids. This would try to preserve the low noise figure and the hybrids would improve the input match of the entire setup. There would be a small degradation in noise figure due to the hybrids, but not much.

[TheUnnamedNewbie]

If we look at the example I gave using the two JFETs in cascode, it is possible to improve the noise figure by placing an L network at the input. This would step up the voltage even higher but at the expense of bandwidth. However, the noise figure should improve to maybe 1.5dB. The downside would be that the input match would still be poor. One way around this would be to make two identical amplifiers with the L network and then fit them in between a pair of -3dB 90deg hybrids. This would try to preserve the low noise figure and the hybrids would improve the input match of the entire setup. There would be a small degradation in noise figure due to the hybrids, but not much.

This is a much more system/board level view as my course though. The course in question is about full-integrated RF circuits (single-chip trancievers) and focuses on almost solely CMOS implementations. Most of my fellow students haven't even heard of JFETs apart from them being mentioned once when it came to "low 1/f noise".

The professor was not really discussing a specific case (unless you mean with that "CMOS amplifier") and started the chapter on LNAs with this example. I think this is why it threw me off - I thought he was trying to say "matching = bad for noise and the best performance is just a unmatched, high-Z gate) but he was not trying to say that, but rather point out that just "matching" our gate wide-band with a 50 ohm resistor was a bad idea.

[G0HZU]

I only mentioned JFETs because they are a jellybean RF part that is cheap and can be configured into a cascode amplifier by most hobbyists using junk box parts. You can make a similar amplifier using MOS parts to replace the JFETs and do a few similar experiments. The net result is a high Z voltage to current device in both cases.

but rather point out that just "matching" our gate wide-band with a 50 ohm resistor was a bad idea.

Agreed, you wouldn't normally do that for a front end LNA in a receiver.

A modern solution for the UHF band would be to use a PHEMT device. By inserting some source inductance it's possible to control the input impedance and get a decent noise figure (<0.7dB?) and still get a good input match to a 50 ohm source. But this usually won't be over a wide bandwidth. However, I've seen cases where the source inductance is used with RC feedback to get low noise and a good match over a couple of octaves of bandwidth. i.e. sub 1dB noise figure and maybe <1.4:1 VSWR across the whole band.

It should be possible to experiment with (added) source inductance for a JFET cascode amplifier for use up at VHF/UHF. I've not tried this myself (with a JFET cascode that is) but it should be possible to get a low noise figure and a good input match at the same time. In your MOS RFIC this added inductance/degeneration could be fitted inside the chip itself as part of a cascode topology. This would help make the input look more 'real' rather than just a highish reactance and it should help align the noise match and input match quite closely if you get it right.

[G0HZU]

Here's an app note from Skyworks showing how you can use feedback to get a low noise figure (<0.7dB) and excellent input match at the same time. At 1.75GHz the input return loss for the matched SKY67100 is nearly 30dB and the NF is about 0.7dB.

http://www.skyworksinc.com/uploads/documents/BRO394_12.pdf

I think this amplifier is a cascode configuration and I assume the device will have some internal source inductance or maybe the package lead inductance and the via hole inductance will be sufficient here.


Here's some more related info about the same device...
http://www.skyworksinc.com/uploads/documents/WP_E_ModeLNA_9_13_10A.pdf

[cdev]

One way to tune a front end LNA for the lowest noise is simple, (if you have the right kind of antenna in the frequency range of interest and a quiet night sky) using a waveguide (a cantenna will do) pointed straight up as one signal source. The difference between the noise temperature of the cold night sky sky and of the ground below the horizon is maximal when you are tuned for the lowest noise.