PA output circuitry confusion

[xtoffer]

Hello,

I've been copying an application note of the output matching for a transmitter. As I don't like to trust the values of these blindly I wanted to make at least a sanity check before trying it out. After closer inspection there are also conflicting values for one component which makes me even more confused.

So as a first I thought I'd spice it up, I have attached a png of the circuit as simulated in LTSpice with a frequency sweep for the two varying values of L2 = 43nH (green) and 82nH (blue). This version is for 433.92MHz and described as matched to a 50 ohm load.

Although neither of the two peak at 433MHz, the 82nH version is certainly closer at ~400MHz. In the simulation L1 and C1 doesn't do anything since they the same node as the output of the signal but I left them in anyways since the whole is what is important.

Before I get to the questions this is my understanding so far. The output of the PA is an open collector/drain type and L1 is the pull-up supplying all the power and should just be chosen high enough not to interfere. I read somewhere that the C2 L2 combination should resonate at the operating frequency which seems not to be true for any of the versions, but that is not including C3 hmm...

Anyways, I am looking for any input on how I should interpret this. If it, at all, is a reasonable way to simulate it. How does L1 and C1 effect things?

Any input is appreciated as I'd like to understand more of this, thanks

[KJDS]

You will need to find a load pull report, or at least an optimum match impedance for the device. Don't tune for gain, you'll tune it to a point where you won't get much power and also poor efficiency.

The matching circuit should be tuned to give an impedance that provides a good compromise between output power and efficiency.

[T3sl4co1l]

Your SPICE model is wrong. The drain output will not be a voltage source.  In general, it will at least be a Norton source (i.e., a current source in parallel with some impedance: the drain capacitance being the dominant part), but when D-G feedback and lead/package parasitics are included, it can be pretty much anything.

What you need is something which describes the drain output impedance: the output scattering parameters (s22) describe this (or any other two-port matrix data: h, Y, X, ABCD; s is the most common for RF though).

There are ways to convert between s-params and a SPICE model, but s-params are typically sampled at points, whereas SPICE is continuous frequency.  The equivalent model can only be equivalent at those points, with a "best guess" inbetween.  If there happens to be funny business between a pair of points, that's not captured in the data, you'll never know.  It's also susceptible to the numerical instabilities of approximations, where, even though the dataset is reasonable, you can get a really nasty solution between points.

Tim

[xtoffer]

Thanks for the replies, simulating the PA was not the main idea, but seems to be needed to see the whole thing in action.

You will need to find a load pull report, or at least an optimum match impedance for the device.

What you need is something which describes the drain output impedance: the output scattering parameters (s22) describe this (or any other two-port matrix data: h, Y, X, ABCD; s is the most common for RF though).

Unfortunately I haven't been able to find any fancy numbers on this. The only thing the datasheet tells me (unless I missed it ofc) is that it(the chip) at ~3V "delivers +10dBm (CW) output power into a 50ohm load". Does this also mean that the output impedance of the PA is 50 ohm or only that it is able to deliver that through the matching network?

Have I understood it correctly that I cannot know if the matching network makes sense unless I know the characteristics of the PA?

So I'm back to the original question, can I check the feasibility of the matching circuit in some way, and which of the L2 values makes more sense.

I'm guessing the normal procedure for these is to take the reference design as planned, tweak to satisfaction and be done with it. I'm pretty much set on needing to fiddle around abit with values anyways depending on how the layout and such turns out but would rather have a basic idea on what is reasonable first.

[T3sl4co1l]

Unfortunately I haven't been able to find any fancy numbers on this. The only thing the datasheet tells me (unless I missed it ofc) is that it(the chip) at ~3V "delivers +10dBm (CW) output power into a 50ohm load". Does this also mean that the output impedance of the PA is 50 ohm or only that it is able to deliver that through the matching network?

Dunno.  +10dBm isn't much though.  A lot of oscillators or DDSs will do more...

It could be unmatched or poorly matched, or it could just be low power.  I have no idea...

Have I understood it correctly that I cannot know if the matching network makes sense unless I know the characteristics of the PA?

Yep.

And for example, in your sim -- if you knew it was a perfect voltage source, that would be fine.  But a real power amplifier (of that type) never is.  An audio amplifier, for example, is usually a pretty reasonable voltage source, compared to its expected loads, over most of its bandwidth -- but that changes at higher frequencies, where the output becomes inductive.  Most RF amp devices are open-drain rather than emitter follower style (as audio amps are), so they have a generally CC || capacitive output characteristic.

In any case, the dynamics of the load network aren't separable from the dynamics of the source, not by just one number (like an impedance) anyway.  Impedance is a complex valued function of frequency.

Also, you can't really do small-signal testing, because capacitances vary with signal level, and maximum power point (usually also with a modest compromise between low distortion and high efficiency) is not nearly the same as the conjugate small-signal impedance.  Sadly, they are determined by separate, unrelated mechanisms, so that doesn't work.

I'm guessing the normal procedure for these is to take the reference design as planned, tweak to satisfaction and be done with it. I'm pretty much set on needing to fiddle around abit with values anyways depending on how the layout and such turns out but would rather have a basic idea on what is reasonable first.

Yeah, tweak it until you get the right output characteristics, is really about the best you can hope for.  You'll want a spectrum analyzer to view the fundamental and harmonics, since filtering harmonics is probably a priority as well.

Tim

[xtoffer]

+10dBm isn't much though.  A lot of oscillators or DDSs will do more...

Yeah it's a low-power ISM band "all-in-one" type transmitter chip, gonna (try to) use it for a dumb sensor node thingy

[xtoffer]

Little update on this. I got around to ordering boards (which turned out to be a nice experience, I thought more would go wrong for a first time). I built two of them for testing. It turns out of the two choices for L2 (82nH and 43nH) the 82n gives a bit more power/range.

As I unfortunately do not have a spectrum analyzer I have tried to get some basic idea what is happening with one of these SDR USB thingies. According to that there is a 10dB difference in output between the two versions. Can this be trusted to at least give somehow accurate relative values like this? As well as for comparing the main peak to any spurious smaller ones.

Otherwise I am fairly happy, however I will need to get a better receiver with a proper antenna before I can tell if I am satisfied with the range for the actual usage.