VHF/UHF PCB-trace simulation?

[awallin]

Hi all,
I made a prototype RF-multiplexer with a fairly straightforward naive "tree" PCB-trace layout to 8-outputs, each switched by a TE HF3 relay (BW spec 3 GHz).

It seems the 'tree-trace' artwork in fact works as a fancy filter, with up to 50 dB of attenuation at some frequencies 

So the question is do I re-design this with a shorter and straighter signal-path based on feeling and experience, or are there good tools out there to simulate what PCB-trace geometry does to UHF frequency-response?
The obvious route is to place more relays at degree-3 nodes ('junctions') of the tree...

Thanks!

[hagster]

As you discovered. That will work as a filter. The unused open circuit lines act as stubs. At a quarter wavelength they transform into a short.

Also not sure what impedence your transmission lines are meant to be but unless you handle it correctly there will be a mismatch refelection at each tee. As an example, if your input impedence into the tee was 50ohm the two outputs should be 100ohms to prevent reflections. You then probably need to transform them back. See attached image for how i am doing it. This works from about 600MHz up. Your requirements is a bit different and different solutions are availaible to you.

Probably your simplest option is to keep all relays very close together. So long as your lines are less than a 10th of the shortest wavelength you should be ok. You can then have normal tranmision lines out to the bpard edges.

[hagster]

Also you can use QUCS to run a simple simulation. Its fairly easy to learn and will do a good job of modeling this.

[awallin]

Also you can use QUCS to run a simple simulation. Its fairly easy to learn and will do a good job of modeling this.

hm, any examples out there on using QUCS for simulating geometry of traces?
Or did you mean derive impedance of traces from geometry and simulate a lumped-element model?

[eb4fbz]

You should cascade several SPDT relays to avoid those stubs and keep everything at 50ohm wideband.

[awallin]

You should cascade several SPDT relays to avoid those stubs and keep everything at 50ohm wideband.

OK so then we will arrive somewhere in the middle of the back edge of the board. What do you think about the curved single trace from this central junction back to the front-panel 'Common' connector? Is it OK with a 50-ohm PCB-trace or would it be better with a SMA-connector on the back of the board and a piece of coax from the SMA to the front-panel BNC-feedthrough?
For manufacturing having all parts on the PCB would be simpler.. and the design-goal here is not multi-GHz but the capability of the HF3 relay so around 3 GHz max.

[TheUnnamedNewbie]

Sonett lite (free version) could be used, it is the closest thing to a physical geometric EM modeler of what has been discussed. 
http://www.sonnetsoftware.com/products/lite/

There are also other free 2D / 2.5D geometric based CEM simulators out there e.g.
http://www.petr-lorenz.com/emgine/

PUFF will do similarly as I recall though more focused on layout than geometry modeling in the MCAD sense.

Sonnet lite is interesting, as are the others... I might download it and do a comparison between it and some other software for a video. (the other software being non-free and totally non-accesible for hobby users, rather as a "how close can you get to the big-boy toys" in the home lab).

OK so then we will arrive somewhere in the middle of the back edge of the board. What do you think about the curved single trace from this central junction back to the front-panel 'Common' connector? Is it OK with a 50-ohm PCB-trace or would it be better with a SMA-connector on the back of the board and a piece of coax from the SMA to the front-panel BNC-feedthrough?
For manufacturing having all parts on the PCB would be simpler.. and the design-goal here is not multi-GHz but the capability of the HF3 relay so around 3 GHz max.

I would go with SMA on the back. As is now, you also have some traces reasonably close by and at low frequencies this will give you interaction. if you don't need to route that connection to the front you can limit this further, improving isolation and such.

Take for example the places I marked in red - here your ground of the GCPW line is very small, and this will translate into strange behavior in terms of impedance, further adding strange notches in your response where this might form some resonances. In addition, at 3 GHz, on FR4, your wavelengths are going to be on the order of a few cm. Make sure that your vias for ground stitching are spaced apart no more than a few millimeters so you don't get some strange things going on there either. (I would just go with a via every mm or so, but of course this depends on what your manufacturing capabilities and costs are).

[ogden]

Is it OK with a 50-ohm PCB-trace or would it be better with a SMA-connector on the back of the board and a piece of coax from the SMA to the front-panel BNC-feedthrough?

It depends on what isolation you are looking for. If you do not mess-up with impedance of your trace, isolation is within desired limits - then you don't need cable. I would test everything with trace first, then decide - improvements are needed or not. Don't overengineer at the very beginning.

[edit] I agree that you need 7 more relays so every split of the signal in your switch is done by relay.

[awallin]

...
I would test everything with trace first, then decide - improvements are needed or not. Don't overengineer at the very beginning.

[edit] I agree that you need 7 more relays so every split of the signal in your switch is done by relay.

Here's a sketch of version 2, with more relays added.
The top row of relays switches each input either "on", or to a termination-resistor on the backside of the board. The plan is to use 1206 sized resistors - not sure if they would fit on the topside or not.
The middle row further selects from the 8 inputs down to 4 choices. The bottom row selects from 4 down to 1.
I didn't add via-stitching yet.

Any comments or thoughts? Thanks 

[ogden]

Seems much better. Traces between u114 & u116, u116 & u118 are off-center. You shall place RF traces as far as possible from other signals/pins. Why so big
 resistors? Power requirements? The bigger resistor, the worse it's hi-freq RF performance. Use smallest resistors possible for given power levels you are working with. If possible - better put termination resistors on top layer so there's nothing about RF on bottom but nice & solid ground plane.

I don't see via stitching along traces. Lack of via stitches could impact frequency response. RF current paths shall be as short as possible, this regards to top/bottom ground plane interconnections as well.

[T3sl4co1l]

1206s are flat to 5 gigs or so, as are vias.  No problem there.

I suppose there might still be squigglies due to the nest of open circuit 1/2 wave stubs -- the output relays could be terminating style as well, so that the unused paths are terminated rather than potentially sloshing around.

Yes, stitching is necessary.  No need to go overboard, just use enough for the required frequency and attenuation.  Realize a tunnel of vias makes a waveguide, so design that waveguide to be irregular (not periodic), and with a width small enough so that signal frequencies are well below cutoff.

Tim

[awallin]

Here's version 2 of the design - now ready for PCB order unless someone here sees some major issues!? 

the common-BNC is top left, and the inputs from there to the right.
Each junction of the tree now has a relay, with the final middle bottom relay U116 common-pin routed to the com-BNC.
To save some space the U114 and U118 relay com-outputs are routed 'wrong way' under the relay - hopefully not an issue.
When not used the inputs are 50R terminated (R101-R108).

The control is similar to the first version: ULN2803 (U110, U120) for switching 5V to the relay-coils, and an SPI I/O expander MCP23S17 to drive the ULNs. Just for laughs I'm using a SATA-connector and cable for SPI to the uC controlling the Mux-board 
LT1963 LDOs are probably overkill and if one wanted to squeeze the BOM-price probably any vreg would do...

TIA for comments,
Anders

[hagster]

Did you calculate the characteristic impedence of those rf tracks?. It looks like you are using coplanar waveguide.

[eb4fbz]

Running RF tracks under the relays will degrade isolation. Running any RF track under components (or anything other than air) will change their impedance.

[awallin]

Did you calculate the characteristic impedence of those rf tracks?. It looks like you are using coplanar waveguide.

I used:
Saturn PCB Toolkit V7.02 http://www.saturnpcb.com/pcb_toolkit.htm
Conductor Impedance tab:
trace width 1.2 mm
PCB Height 1.55mm FR4 ER=4.6 (W/H 0.77)
Gap 0.2 mm
Impedance 50.095 Ohm

the ground-plane isn't completely unbroken under the traces, since this is a 2-layer board and the relay-coil signals need to be routed somehow..
but hopefully this doesn't change the trace impedance too much.

[awallin]

Running RF tracks under the relays will degrade isolation. Running any RF track under components (or anything other than air) will change their impedance.

Yes, I guess the question is how big this effect can be. Isolation isn't that critical in my application.
From the datasheet the relay body sits 0.9mm above the top PCB surface: http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=108-98000&DocType=SS&DocLang=EN   (page 4)

[yl3akb]

Those 'under relay' sections are electrically short and most of the field is under the CPWG trace anyway, so I would not worry to much in this case. Much more important would be to not interrupt return current path, for example just before the U116, control line seems to be interrupting RF trace. It looks like return current flows through relays itself (thats why they got those GND pins), so it is better to interrupt ground plane under the relays,not under Your CPW traces.

[awallin]

Those 'under relay' sections are electrically short and most of the field is under the CPWG trace anyway, so I would not worry to much in this case. Much more important would be to not interrupt return current path, for example just before the U116, control line seems to be interrupting RF trace. It looks like return current flows through relays itself (thats why they got those GND pins), so it is better to interrupt ground plane under the relays,not under Your CPW traces.

thanks for the comment!
I revised the top-layer GND-plane around the CPWG-traces now so that there is unbroken GND all around the signal traces.
With a 2-layer board unbroken GND-plane on the bottom surface also might be hard or impossible - could still look at this though...

due to Easter the PCB-order will go out Tuesday, so still some days to fine-tune...

[awallin]

Version two of the 1:8 MUX board assembled today and tested.

This one is significantly better than version 1, which had deep notches at 300 and 900 MHz.

This version 2 has no major ugly things in the attenuation-spectrum up to 3GHz (max of the SA I was using).
There's a bit of waviness with a 300 MHz period and then small wiggles on top of that.
The -3dB point is around 1 GHz with attenuation of 6 to 9 dB at 2-3 GHz.

Next I want to test if this bandwidth has any effect on the rise-time of a fast pulse edge. If not, I think I am done with the MUX-design for now.

cheerio,
AW

[eb4fbz]

That S21 ripple is usually due to poor return loss. Those BNC connectors with leads are probably not the best option for high bandwidth or fast rise times. Cascading several HF3 relays doesn't help either due to VSWR.

Fast rise time pulses would probably look horrible through that device because of frequency response ripple and reflections, besides rise time limitation due to the limited bandwidth.

[awallin]

That S21 ripple is usually due to poor return loss. Those BNC connectors with leads are probably not the best option for high bandwidth or fast rise times. Cascading several HF3 relays doesn't help either due to VSWR.

Fast rise time pulses would probably look horrible through that device because of frequency response ripple and reflections, besides rise time limitation due to the limited bandwidth.

OK... I can try with shorter cables and see if the ripple is less. Do you have some alternative to suggest for the HF3 relay and/or the geometry in which they should be placed.
I know that there are e.g. mini-circuits coaxial relays specified up to 12 GHz, but they are at a price-point of 2 keur or more typically for 6:1 config or less ports.

Note that the figure is 3dB/DIV so I don't think a fast edge pulse will be distorted that much since the attenuation is -3dB at 1GHz and slowly going down to -9dB at 3 GHz.

[awallin]

Here is the MUX-board in action, driven by an Arduino Due with Ethernet shield.

https://youtu.be/czd-8E52GP4

[ogden]

Here is the MUX-board in action, driven by an Arduino Due with Ethernet shield.

RF Christmas tree

[awallin]

Here is the MUX-board in action, driven by an Arduino Due with Ethernet shield.

RF Christmas tree

Here's a revised board with 5V/3V3 and SPI all in one 10-pin ribbon-cable, and we switched the controller from Arduino Due to a smaller Arduino MKR Zero + Ethernet shield. The breakout from Arduino MKR Zero to 10-pin IDC is just a quick hack for now. Enjoy

[Wolfgang]

Hi,

I have tried to make switches with similar results as you have obtained. IMHO, the loss limiting elements are the relays themselves.
When you add up the relays in the path, the loss is about 1dB at a GHz per relay. This is approximately what the datasheets says.

If you really want to be better a coaxial switch (8-fold SMA) could do the same with a loss than half a dB until 3GHz.