Rigol MSO7000 Unboxing & First Impressions

[rsjsouza]

Based on my own experience with largest int IT vendors the number of people (the actual "doers") is rather small with product development. My bet the 7000 series has been developed/created by 2-3 guys max. They spent 4-8 years with it. All inclusive - box design, electronics/Asic/pcb, sw, testing, documentation. The other xx thousands employees are usually with production and sales/marketing.

My experience differs: to me this would be true with either an update or a new design but using subsystems of a previous one. In this case, the new ASIC probably demands more people to properly design, test/characterize and document it for the end product design folks. One thing I agree: it is not an army of people but maybe 8~10 for the ASIC and maybe the same amount for the product (including documentation, graphical design and marketing).

Regarding the design, the 60 degree angles of the front fascia lines seem to form a brand identity as they match the hexagonal shapes of the vents in the back, the front oscilloscope cover and even some shapes present on the DS1000Z/DS2000 series.

[iMo]

The actual teardown would be nice to see. The "Asic" development must not be such a big deal. The most hw stuff comes from previous versions. They just pushed the old verilogs/vhdl they used with those EOL Xilinx'es (discontinued 10y back??) they are/were using in their gear into the new "Asic" (I would expect a lot of marketing with the "Asic", btw). 1 manyear of a comfortable work max (a conservative estimate).

[bitseeker]

So, with regard to the rectangular divisions on this scope, apart from it being odd and irritating, do you find it to be a bit of a cheat? You only get 10 horizontal divisions on the 7000's big, wide screen. However, less expensive Rigol scopes have 12 divisions and Siglent have 14. Does the 7000 give you more resolution per division?

[rsjsouza]

So, with regard to the rectangular divisions on this scope, apart from it being odd and irritating, do you find it to be a bit of a cheat? You only get 10 horizontal divisions on the 7000's big, wide screen. However, less expensive Rigol scopes have 12 divisions and Siglent have 14. Does the 7000 give you more resolution per division?

I agree; both the DS4000 and DS6000 series have 14 division squares on their smaller resolution screens.

[nctnico]

So, with regard to the rectangular divisions on this scope, apart from it being odd and irritating, do you find it to be a bit of a cheat? You only get 10 horizontal divisions on the 7000's big, wide screen. However, less expensive Rigol scopes have 12 divisions and Siglent have 14. Does the 7000 give you more resolution per division?

This is a tough question because there isn't a definitive answer. More horizontal pixels per time unit gives you more signal detail. Less horizontal pixels per time unit gives you more signal. Pick your poision. IMHO it doesn't really matter if the oscilloscope has coarse and fine horizontal control.

[BravoV]

Really curious on the HDMI output at a big monitor.

[Old Printer]

Really curious on the HDMI output at a big monitor.

Same here, though as a beginner hobbyist I am hell and gone from buying a 3K+ scope. Besides a couple old analog Teks all I have at the moment is an Analog Discovery and with 65 year old eyes I really like having a big monitor. I wish there was a $500 range scope with monitor support, even if it were a $200 option.

[BravoV]

Really curious on the HDMI output at a big monitor.

Same here, though as a beginner hobbyist I am hell and gone from buying a 3K+ scope. Besides a couple old analog Teks all I have at the moment is an Analog Discovery and with 65 year old eyes I really like having a big monitor. I wish there was a $500 range scope with monitor support, even if it were a $200 option.

Same interest on using external monitor as my eyes are getting weaker too. Fyi, Owon scopes have monitor output. And the same reason I love my SA setup with an old 4:3 monitor as it fits nicely, as I'm starting to hate those small screens.

[bitseeker]

I'm also curious how they implemented the layout of the external display since the resolution is higher. Could the built-in display just be cropped and the external will provide more divisions?

Looking forward to the review to find out.

[jadew]

Siglent can make a clean, non-confusing front panel.

Siglent can't come up with their own design. They copy from both Keysight and Rigol, nothing to praise there. The one you linked is an imitation of the Keysight design.

Regarding the MSO7000 series - I'm not sure where it leaves the DS4000 ones, which are similarly priced, but with which you now get less value for money. Maybe they'll get their price adjusted soon?

[EEVblog]

Regarding the MSO7000 series - I'm not sure where it leaves the DS4000 ones, which are similarly priced, but with which you now get less value for money. Maybe they'll get their price adjusted soon?

Wouldn't surprise me if they cleared those out in a super sale.

[EEVblog]

The lack of complexity in the new 500MHz front end is amazing. They have a new ASIC there that does almost everything.
No reason they can't put this 500MHz front end in an entry level scope.

[bitseeker]

Regarding the MSO7000 series - I'm not sure where it leaves the DS4000 ones, which are similarly priced, but with which you now get less value for money. Maybe they'll get their price adjusted soon?

Wouldn't surprise me if they cleared those out in a super sale.

That could be interesting. Upgrade time?

[BravoV]

On the ASIC part, just the pure manufacturing excludes R&D cost, is it relatively cheap ?

[EEVblog]

SPOILER ALERT

[bitseeker]

There's a lot of vacant land in that there neighborhood.

And a little heatsink twist for style.

[tautech]

Siglent can make a clean, non-confusing front panel.

Siglent can't come up with their own design. They copy from both Keysight and Rigol, nothing to praise there.

Yeah right ! 
The topic of discussion IS scope front panel design and Siglents SDS2000X is a much better and well though out layout than this new Rigol 7000.

Why ?
Well it would seem Rigol think EE's are left handed.
USB jacks on the left.
Probe Cal left of inputs
Wave gen outputs on the left.

Study the images in reply #29 and have intelligent thoughts of which layout ergonomics might be best to work with.

[1anX]

I seem to get feeling that Rigol might have to end up with a 50% off sale on the new 7000 series straight up if they really want some market share.
That photo of the front end really screams low end r&d and manufacture. A low end, front end, even the heatsink is mounted skew if!
I cant wait for the review! The do it all ASIC needs to be sensational for this 8 bit scope to warrant the sort of dosh Rigol are hoping to be paid for these new scopes.

[jadew]

Siglent can make a clean, non-confusing front panel.

Siglent can't come up with their own design. They copy from both Keysight and Rigol, nothing to praise there.

Yeah right ! 
The topic of discussion IS scope front panel design and Siglents SDS2000X is a much better and well though out layout than this new Rigol 7000.

Why ?
Well it would seem Rigol think EE's are left handed.
USB jacks on the left.
Probe Cal left of inputs
Wave gen outputs on the left.

Study the images in reply #29 and have intelligent thoughts of which layout ergonomics might be best to work with.

I don't see any ergonomics issues there. What I see is a poor imitation of a great design and an original new design that doesn't look half bad and it's in line with their other products.

My initial comment was objecting to giving credit to Siglent for that design, when it's not theirs to begin with. They copied the layout from Keysight and those curved lines and angles from Rigol.

The same can be said about their signal generators, Keysight layout and Rigol look. If they didn't have the logo, you could easily confuse them with a Rigol tool.

[rf-loop]

The lack of complexity in the new 500MHz front end is amazing. They have a new ASIC there that does almost everything.
No reason they can't put this 500MHz front end in an entry level scope.

Is it so that full vertical resolution is only from 4mV/div - 10V/div. 1mV/div and 2mV/div is just zoomed from 4mV/div. (when use 10x probe 40mV/div!)
Also in your first video it looks like 1mV/div you have set some BW filter on... perhaps 20MHz. Is it so?

Is this ASIC for reduce analog front end cost or make front end better.

[jadew]

I seem to get feeling that Rigol might have to end up with a 50% off sale on the new 7000 series straight up if they really want some market share.
That photo of the front end really screams low end r&d and manufacture. A low end, front end, even the heatsink is mounted skew if!
I cant wait for the review! The do it all ASIC needs to be sensational for this 8 bit scope to warrant the sort of dosh Rigol are hoping to be paid for these new scopes.

I assume a lot of the circuitry has been shifted into the ASIC, where components are inherently matched to eachother and everything can be built to much tighter specs.


Edit:

Is this ASIC for reduce analog front end cost or make front end better.

Could be both, but we can't really know if it made it better or not. The main reason for the ASIC was most likely to be able to get the 600k wfm/s, everything else was secondary.


Edit 2:
Now that I think about it, one thing that bothered me about this new scope is its limited bandwidth (only 500 MHz). I was expecting they'd have at least a 1 GHz version (considering the 10 GSa/s), so it's possible the ASIC made things worse and that's all they get with the new frontend.

[nctnico]

Everybody keeps talking about the ASIC but it seems to me it is just a fast ADC with an analog input switch. The Xilinx Zync FPGA should have no problem dealing with 10GByte/s to/from the DDR memory so my guess is that all the oscilloscope functions are done inside the FPGA.

The front-end doesn't seem revolutionairy to me. This is a dual channel 500MHz front end from a Yokogawa scope from (I think) the early 2000's:

[tautech]

Siglent can make a clean, non-confusing front panel.

Siglent can't come up with their own design. They copy from both Keysight and Rigol, nothing to praise there.

Yeah right ! 
The topic of discussion IS scope front panel design and Siglents SDS2000X is a much better and well though out layout than this new Rigol 7000.

Why ?
Well it would seem Rigol think EE's are left handed.
USB jacks on the left.
Probe Cal left of inputs
Wave gen outputs on the left.

Study the images in reply #29 and have intelligent thoughts of which layout ergonomics might be best to work with.

I don't see any ergonomics issues there. What I see is a poor imitation of a great design and an original new design that doesn't look half bad and it's in line with their other products.

My initial comment was objecting to giving credit to Siglent for that design, when it's not theirs to begin with. They copied the layout from Keysight and those curved lines and angles from Rigol.

The same can be said about their signal generators, Keysight layout and Rigol look. If they didn't have the logo, you could easily confuse them with a Rigol tool.

Oh FFS, how many variations on TE front panel layout can their possibly be ?
Just because a manufacturer chooses to do a similar design to another you call that copying ? 
Yes KS in one guise or another have been around forever and have refined the ergonomics over many decades, why, because its right and what the customer wants. Any 'new kid' on the block would be foolish to overlook decades of front panel development that's primarily been done for ease of usage.

Do we go down the path like Fluke has and say it can ONLY be yellow if it's a Fluke ?   

[iMo]

We've got two threads on the same 7000 topic, haven't we?

..The Xilinx Zync FPGA should have no problem dealing with 10GByte/s to/from the DDR memory so my guess is that all the oscilloscope functions are done inside the FPGA..

We need a video with the teardown to get a better understanding.
10GB/s could be a challenge even for an 866MHz dual core inside the Zynq.
My guess is the Zynq is for UI and LCD video, and there is a second Asic dealing with sample's memory and some dsp upon it.
PS: an "ideal arch" could be

4x FE_ASICs ----> 1x MEM_ASIC_WITH_16_16bit_RAM channels ----> Zynq_512MB_LCD_UI_HW_Interfaces

[2N3055]

Amount of unwarranted bitterness in comments is quite amusing..

Since all are speculating whatever they want to prove their point, i decided to look up some info..

It seems Rigol developed 3 custom chips :

1. Active differential probe chip (one that goes inside probe). That is high frequency, analog chip
   Active differential probes in GHz range cannot be discrete design.. This is their attempt to do it right. We will see if they were successful.

2. Scope front end chip. That is the chip that represent integrated input channel (analog part) together with attenuators.
   Similar like above, front end of a scope channel on higher frequencies can benefit from integration.. So far all Chinese scopes were made from off the shelf parts  in discrete SMD. This front end supposedly have capabilities to reach 4GHz. If true, using that chip will make 500 MHz scopes trivial.. You slap that on board and route it to A/D.  Of course, we'll see how successful they were.

3. They developed fast 10GS/sec 8 bit converter with fast buffers at front (to ease driving of A/D) , A/D, and even some DSP on chip (probably some data shaping, filtering, corrections.....details are fuzzy)
 So far all Chinese scopes used off the shelf A/D. Now they have one of their own. Even if it is not perfect, they can tweak it to perfection eventually. But so far, it looks like it's working well. Remains to be seen.

The architecture is completed by SPU (sampling processing unit) and WPU (waveform plotting unit). Those seem to be inside Zync. Or maybe SPU is separate chip. We'll see when Dave opens it.

SPU is quite complex , and has 2560 MB local waveform memory with claimed 32GBps bandwith. It also has Real time Fir filters, Hi res mode, Averaging, Sin(x)/x, interpolation, freq counter, triggering, protocol decoders, measure accelerator, and segmented mode capture all hardware accelerated. 
In WPU and central control unit, FFT and math are running on CPU cores, accelerated by DSP accelerator.

By keeping that part of UltraVision II inside FPGA, they can fix bugs, add functionality and upgrade for new generations of products.
Their own front end and A/D chips will be probably cheaper that what they pay now, so they could use them on lower end.
At one point, when UltraVision II is proven to be functioning well and that they are happy with functionality blocks built in , they might even make an ASIC version of it.

As I said before, it remains to see how successful they were in achieving targets.
But to belittle huge effort it took to develop all this, it's just bad form.
These guys did huge techonological leap compared to what was state of the art for Chinese companies, only year ago.

Capabilites wise, it is better than many scopes out there. And if there are bugs, they will sort them out. You cannot upgrade 4 MS memory to 100MS with firmware update....

I cant wait to see what new Siglent will bring to the table. That will be interesting too.

As for the pricing, market will sort that out. I allready see Tektronix adjusting prices, rest will follow.

And yes, if it happens to be hackable, it will be best selling scope in history....