TESTS: Siglent SDG5082 Function/Arbitrary waveform generator. (+Inside images.)

[rf-loop]

I will update more tests results after they are ready.  So, this is as "under work"!


Siglent SDG5082 is member of SDG5000 serie. There is 80, 120 and 160MHz models. This is 80MHz model.
Specs and features can read from SDG5000 User Manual, Data sheet and Service manual.







There is plan to test lot of things so that also results are enough accurate and reliable test data.
It takes time. One reason is that I do it just like hobby and priority is "after more important things".
Also all equipments and accessories, used for tests,  need some kind of accuracy check so that least I can trust results. Also some tests setups need rearrangements in my workshop because there is running also other things.Which order I show tests results do not mean the order of importance for me or any others. One of the test may also be one that someone has requested it.

I do not (very often) tell if some thing is good, nice, exellent, crap, bullshit or other just my opinion.  I take more this the approach angle that I show test data and perhaps later also some other details. You look data and make your own conclusions. But also, compare to other equipmenst is difficult becouse there is not so much available real tests.


Of course I can tell if I want that oh this is...  and oh that is.... and this is nice and best and all superlatives to positive and/or  to negative direction as oh what shit...specially if do not know how to ,measure and how to use equipment what I'm testing. But there is enough this type of tests...so... it is not for  me.  Yes, if I need equipment I do it inside my mind  for my self and related to my needs and also related to what I like and what not... specially in UI. 
You look data and make your own thinking.
I try keep data as reliable as possible. If you see something wrong in data or measurements please inform me. I try explain better or just correct it.


Here first frequency response from around 300kHz to 80MHz.
SDG5082   0213 manufacture, FW:5.01.01.07R1
HP8568B  Spectrum analyzer.  (this flatness is good but absolute level may have some small error specially between different RBW (some fraction of decibel). Also horizontal scale may have small errors and this is not now connected to external accurate freq reference.
BNC - N adapter (Suhner)
~1.5M  NEK  M17/084
Images from HP8568B/HP-IB  to  USB/PC by Prologix 6.0 adapter and KE5FX GPIB Toolkit.


SDG5082   set for +13dBm output. (of course 50ohm)
Sinewave.
Freq Sweep made by hand using SDG knob with small steps.
HP8568B  mode  Max Hold. (for clarify: something like "Peak hold mode")



~1MHz  - 80MHz   Note that level scale is 1dB/div
(with this scale and near zero freq  RBW affect so that "zero" start show just near left side (<2MHz, just do not care it)




300kHz - 10MHz. (note small level difference between first image. This come from different RBW filter. Inside one picture analyzer (+ cable) itself flatness is very good so markable part of quite small level deviation come from device under test.) Note that level scale is 1dB/div!


---------------




Here  80MHz sinewave  with maximum output level, +17.9dBm
Spectrum display mode: Max hold!






10.7MHz  level +13dBm   
Spectrum display mode: Max hold!







50MHz   level -47dBm (1mVrms)
Spectrum display mode: Max hold!





10.7MHz  and maximum level +23.9dBm, overview of harmonics and non harmonics.
(3th harmonic around -45dBc)




10.7MHz  and level +13dBm  overview of harmonics and non harmonics.
(3th harmonic around  -50dBc)

Sometimes here may find some more test images and data or something more detailed information.

[rf-loop]

For compare, here one sample from old SDG1025 test (one yar ago)
11MHz and level +17dBm
also here spectrum RBW 10kHz 



Of course SDG5000 have better signal, this is natural.

[rf-loop]

Some test for Voltage levels (DC offset)
Not, if you use it for DC source:
Remember it have 50ohm source impedance.  This is not "power supply".





Frequency accuracy (internal reference clock in use) measured just after  DC offset voltages test.
HP53131A  connected to GPS OCXO  (GPS OCXO stability is not now best possible, so this continuous fluctuation up and down is included and unknown.
CH1 out 10MHz Sine  +13dBm
watching time around 1 hour.  (10s gate)
Min  10.000 000 868
Max 10.000 000 971 

Short time tests, just one shots using 10s gate.
33MHz out:  result 33.000 002 88
50MHz out:  result 50.000 004 49
80MHz out:  result 80.000 007 36
100kHz out: result 100.000 009 19 (kHz)




To be continued.......  (the next few days is busy with other things)

I hope I can show soon tests results about square wave signal quality.
(It is really different s SDG1000)

[maiakaat]

It looks good so far

[rf-loop]

Some test samples.

I have been interest about SDG5000 square waveform quality.

These images are self explanating.





Note: SDG1025 test with ~10kHz and SDG5082 picture test freq 1kHz



SDG1025 time jitter. SDG5000 series is totally different.
Still it is good to note that SDG1000 jitter is as specified.
This is cycle to cycle random +/- jitter and not long time cumulative.

 



SDG5082 Square Wave time jitter is naturally better than SDG1000 series
(naturally, becouse circuits principle is totally different. Not derived from internal sinewave using comparator method as very usual in this class. Note: If need less jitter, SDG1000 can use Pulse mode for produce square wave. With low frequencies it have less timing jitter. Higher frequencies, Sguare wave have less jitter than Pulse. Pulse have always 8ns jitter due to 125MHz clock.)





SDG5000 Pulse Mode. 5MHz 50% duty. (rise and fall time adusted. Minimum value 6ns)
Edge rise and fall time is separately adjustable!
NOTE: In picture read Square Wave. This is wrong.
Edges can adjust in PULSE mode!!

[rf-loop]

Siglent SDS oscilloscope  captured waveform can move to SDG5000 and then repeat.
Later more about this feature.

Simpliest it can do so that save captured waveform .csv data to USB  and then move USB stick to SDG5000 and read this .csv data to Arb memory. Just then select this stored Arb waveform for output. With SDG5000 level, offset and frequency adjustment you can scale it so that output waveform is equal what was captured using Siglent oscilloscope.

Tested and works without problems.
This was simple method.

But later I will give also information with some tests about:
SDG5000 "Seamlessly work with SIGLENT Digital Storage Oscilloscope"

[rf-loop]

What is the build quality like? I have heard some Siglent stuff is not that good, while other products are excellent.

Externally, build quality seems good. Of course, if the device would cost ten times more, I would like that the connectors are genuine Suhner, Rosenberger, or other very high quality. Possibly even the entire structure could be a die-cast aluminum. It is good, however, to relate to the requirements of what is the price.

As I said before, I'm not going to typeset positive or negative superlatives in all sorts of astonishment expressions. Siglentin common way to protect the surface of the TFT gets me, however, + points.
I do not make tear down rewiev show business where only "boss" is the popularity without any standards.

Instead, in the near future I am going to present some boring documentary photos of the device inside and out.

And of course more test data with some test pictures.

Now it is running  frequency stability tests so I can not touch it.

[rf-loop]

Here some pictures from inside.
More pictures and also detailed pictures coming later.

In first image, just top side of grey ribbon cable there is 3 big IC's.
They are Analog Devices ADUM1410 isolators.
(Main output (CH1, CH2) GND's are floating from equipment ground, max 42V)


Just top side of "big" heatsink can see main DAC (500Msa 14 bit double DAC)
Analog Devices AD9781.

Next picture can see output amplifiers. Both channels are similar.
Outputs have SMB connectors.

Left from wide grey ribbon cable is frequency reference. Xtaltq Technologies, BT0507 series 10MHz TCXO. 

TCXO specifications meets well Siglent specifications for SDG5000 series.

It can also note that this TCXO have fine adjustment control. (pin1)



Overall all PCB's are extremely clean and no any signs about hand soldering.

Work has been done on the whole very carefully.

Minor class note: The wires that come from the power supply side would have protected the insulating sock (if I do it). On the other hand corners are rounded so the insulation is not the risk of breakage. (as long as the door is closed so that the wires are in the correct position) Work has been done on the whole very carefully.
The wires that come from the power supply side would have protected the insulating sock. On the other hand corners are rounded so the insulation is not the risk of breakage. (as long as the door is closed so that the wires are in the correct position) Also, just a cable tie would help.

[maiakaat]

Looks like they've used decent caps in some of it too

[rf-loop]

Here some more images from inside.

Later I will give link to full size images if anyone is interested.


PSU.  Looks like all dark color electrolytics are Rubycon 105 degree.
Big white power connector is for Channel board
Small two pole white connector is for Main board



Main board.



Channel board.  Note that both channels have equal end amplifiers including driver amplifier. (in SDG1000 series CH1 and 2 amplifiers are different) Also outputs are floating from equipment ground. Note also isolated connection between main board and channel board. (Analog Devices Digital signal Isolators 3x ADUM1410. Main DAC is AD9781  2x500MSa 14bit)
On the board is default TCXO. It looks like there is also ready place for better reference.



Front panel.



Frame etc.

For some mechanical construction and test point details, look Service manual (available from Siglent download center)


Bigger size picture example from PSU top.

[rf-loop]

Here one medium resolution sample picture from Channel board output amplifiers.
Note that outputs GND is floating from chassis ground. (Max 42V but this can stop some ground loop currents between equipments).  Output power is 4 times Rigol 4000 example between 20MHz to 40MHz. (specs)

Soon I will continue tests after I have assembled unit exactly back to its original factory state.

[rf-loop]

Some amount more accurate test for internal 10MHz frequency reference (default reference TCXO) frequency accuracy and hours level stability. Measured from rear panel  frequency reference output.




Available output levels compared to Rigol DG4000 series:
Sspecially between 20-40MHz difference is big. 4 times more power.

[rf-loop]

Before I go to other tests this one odd finding. Not problem, but user is important to know.

About rear panel 10MHz Reference input and output. This I find when I work with frequency accuracy tests.

Utility --> System and there side 2/2.
CLKSource
Internal
External

Internal:

Internal 10MHz reference (TCXO) is selected.
Rear panel "10MHz In" do not affect.
Rear panel "10MHz Out" have internal frequency reference frequency.

External:

External reference is selected and there need be valid clock available.
Rear panel "10MHz In" frequency is used as frequency reference.
Rear panel "10MHz Out" have internal frequency reference frequency.

- External clock need be least same or better quality (stability, accuracy, phase noise/jitter) than internal reference, in other case equipment specifications are not valid.


Attention:

Rear panel "10MHz Out" have allways internal frequency reference frequency.
Also in case that equipment is working with external reference clock.
If you use external reference also to other equipments, it can not take out from this output.
In general, chaining is not a very good way to share your reference in lab. Therefore, this is not a big problem. But the device, however, is unusual in this respect. It is good to remember when using the device.

I recommend that if this is used in lab where also is external  frequency reference for use. Add some kind of note to rear panel that "10MHz out" give allways internal TCXO reference frequency out independent of what reference is in use.

Also, on the display, there is not any indicator what can always see that equipment is satisfied locked to external frequency. (there is not even check if external clock is valid or not, it just work out of order if external freq is selected and it is out of order. On the TFT there is lot of free room for this kind of continuous indicators as normally in many equipments what have internal or external reference.)

It is not problem or fail. But  user need carefully know that all is ok with reference for avoid mistakes if do some frequency critical things.

[jpb]

Before I go to other tests this one odd finding. Not problem, but user is important to know.

About rear panel 10MHz Reference input and output. This I find when I work with frequency accuracy tests.

Utility --> System and there side 2/2.
CLKSource
Internal
External

Internal:

Internal 10MHz reference (TCXO) is selected.
Rear panel "10MHz In" do not affect.
Rear panel "10MHz Out" have internal frequency reference frequency.

External:

External reference is selected and there need be valid clock available.
Rear panel "10MHz In" frequency is used as frequency reference.
Rear panel "10MHz Out" have internal frequency reference frequency.

- External clock need be least same or better quality (stability, accuracy, phase noise/jitter) than internal reference, in other case equipment specifications are not valid.


Attention:

Rear panel "10MHz Out" have allways internal frequency reference frequency.
Also in case that equipment is working with external reference clock.
If you use external reference also to other equipments, it can not take out from this output.
In general, chaining is not a very good way to share your reference in lab. Therefore, this is not a big problem. But the device, however, is unusual in this respect. It is good to remember when using the device.

I recommend that if this is used in lab where also is external  frequency reference for use. Add some kind of note to rear panel that "10MHz out" give allways internal TCXO reference frequency out independent of what reference is in use.

Also, on the display, there is not any indicator what can always see that equipment is satisfied locked to external frequency. (there is not even check if external clock is valid or not, it just work out of order if external freq is selected and it is out of order. On the TFT there is lot of free room for this kind of continuous indicators as normally in many equipments what have internal or external reference.)

It is not problem or fail. But  user need carefully know that all is ok with reference for avoid mistakes if do some frequency critical things.

Won't the internal reference be phase-locked to the external reference if there is one, so the accuracy of the internal reference should match the external one? The Siglent specification lists a lock time of < 2s implying that this is what they do.

Daisy chaining might not be optimal, but for home lab users with limited space and budget for distribution amplifiers it is a convenient solution.

[rf-loop]

Before I go to other tests this one odd finding. Not problem, but user is important to know.

About rear panel 10MHz Reference input and output. This I find when I work with frequency accuracy tests.

Utility --> System and there side 2/2.
CLKSource
Internal
External

Internal:

Internal 10MHz reference (TCXO) is selected.
Rear panel "10MHz In" do not affect.
Rear panel "10MHz Out" have internal frequency reference frequency.

External:

External reference is selected and there need be valid clock available.
Rear panel "10MHz In" frequency is used as frequency reference.
Rear panel "10MHz Out" have internal frequency reference frequency.

- External clock need be least same or better quality (stability, accuracy, phase noise/jitter) than internal reference, in other case equipment specifications are not valid.


Attention:

Rear panel "10MHz Out" have allways internal frequency reference frequency.
Also in case that equipment is working with external reference clock.
If you use external reference also to other equipments, it can not take out from this output.
In general, chaining is not a very good way to share your reference in lab. Therefore, this is not a big problem. But the device, however, is unusual in this respect. It is good to remember when using the device.

I recommend that if this is used in lab where also is external  frequency reference for use. Add some kind of note to rear panel that "10MHz out" give allways internal TCXO reference frequency out independent of what reference is in use.

Also, on the display, there is not any indicator what can always see that equipment is satisfied locked to external frequency. (there is not even check if external clock is valid or not, it just work out of order if external freq is selected and it is out of order. On the TFT there is lot of free room for this kind of continuous indicators as normally in many equipments what have internal or external reference.)

It is not problem or fail. But  user need carefully know that all is ok with reference for avoid mistakes if do some frequency critical things.

Won't the internal reference be phase-locked to the external reference if there is one, so the accuracy of the internal reference should match the external one? The Siglent specification lists a lock time of < 2s implying that this is what they do.

Daisy chaining might not be optimal, but for home lab users with limited space and budget for distribution amplifiers it is a convenient solution.

This is quarenteed time for unit lock to external reference.
It looks like it do not adjust internal TCXO. In case there is external clock this internal TCXO live its own independent life and it is not used to system at all but still it is available from 10MHz output connector. (and if disconnect external reference when it is selected for use, equipment have not at all clock (on the channel board and signal is out of order or no signal)
Of course main board ("brains") have its own clock)

I will loater check this agen but I think I have not made mistake. (also I have done external clock sweep (+/- 100kHz 10MHz) and equipment follow it. Internal TCXO do not follow it so it is overrided. Also TCXO adjust pin voltage looks like stay steady (1.52V)

So, this 10MHz output can use for syncronize other equipments but only IF internal reference is in use. (test data table can find some idea about its accuracy, what is well enough for many ordinary purposes) If need external reference and if want in this case syncronize also other equipments then reference need share other way than chaining exept if this unit is last in chain.

[jpb]

Thanks for taking the trouble to do those detailed checks.

It seems a strange decision by Siglent to neither phase lock the internal TCXO nor to simply switch the external through a buffer to the output (which is what TTi do with their TG5011 whilst Agilent I think phase lock their 33520 as they list frequency range specks for the external reference which are different depending on which internal oscillator you have fitted).

As you say, it is not a big deal as long as you know. The main purpose of the external output would seem to be to keep a check on it with a frequency counter perhaps. Most other equipment with the option of an external frequency standard input probably already has at least as accurate an internal oscillator. Getting two generators in synch might be useful.

[rf-loop]

Some random tests.
Arb pulse tests is small part of tests for analyze  Arb functions, later some more about its frequancy responses etc more detailed things.



ARB 16834ns cycle. Starting of ARB,  first 128ns pulse.
SDG5082 set for 16834ns cycle time.
(Oscilloscope used here is SDS1102CML, oscilloscope input terminated with 50ohm feed thru, before feed thru there is also 10dB 50ohm attenuator (Suhner) and some adapters becouse I do not have so much things with BNC, nearly all stuffs are N or SMA)
SDG output level adjusted then for around vertical 6 division display.



ARB cycle time changed 16384, 8192, 4096, 2048, 1024 and 512ns
Of course then pulse wide change proportinally 128ns, 64, 32, 16, 8 and 4ns.
Note that waveform generator sampling speed period is 2ns (500MSa/s)
Scope persistence infinite.




Same ARB as before. (16384/128ns)
Cycle time now 2000ns.  (500kHz)




Same ARB as before
Cycle time now 2001ns.
Now there can see bistable jitter. Just 2ns becouse sampling interval is 2ns and it need adjust for  "average" freq /cycle time.




100kHz triangle. Duty "zero".



100kHz triagle (dyty "zero") rising edge.




Pulse risetime and also fall time (both separately of course) can adjust with fine steps.
(note that falling edge have moved some amount  becouse trigger position is not precisely right point when I adjust edge risetime)



It can produce fast pulses with fast risetimes also if there is used very low frequencies. Here 12ns to 60ns pulses and frequency 20Hz. And it really can adjust with 1ns steps even with these low frequencies! Also it keep risetime.
Edges and pulse width adjusting resolution is down to 100ps.
Siglent name these new features as EasyPulse:

"SDG5000 adopts Siglent original technology EasyPulse, not only enhance the hardware index but also improve the software. It can output high quality, high flexible pulse signal: 100ps low jitter, ultra wide duty-factor range: 0.0001% ~ 99.9999%, quick rising/falling edge 6ns ~ 6s, edge and pulse width precision can be adjusted: 100ps resolution.SDG5000 can meet different application situations."

But this 100ps low jitter is better to read as "down to 100ps"

I will later analyze better this jitter. Also I'm not interest about "rms" jitter as long as this value is proofed  with some unknown method. Time jitter is difficult case.

One approach is measure long time maximum peak to peak jitter over one cycle.
But these numbers are not nice.
 
Many manufacturers tell "rms" value for jitter (and perhaps just from 1SD).
Very simple and  nothing real or related to this equipment, example. It there is 9998 samples zero jitter and then one -10ns and then one +10ns. What is now rms jitter. In my some circuit rms jitter is not meaningful but  these peak values may really do bad things and even kill peoples.

And now this is difficult. Example I do not have any equipment what can take exactly 10000 samples sequentially (every cycle example) and analyze this distribution.

I understand well why manufacturers, example Agilent,  argumenting for rms values. It is nice to write specifications with nice looking numbers but more important is that most of users can not proof if equipment do not meet advertisements or specifications.


Attached also  (just change .txt to .csv if want use it) used for this Arb tests. (both channel give same result with this same 16k csv.)
(Ch2 have also 500k but not yest tested, just only played some funs)

[rf-loop]

Won't the internal reference be phase-locked to the external reference if there is one, so the accuracy of the internal reference should match the external one? The Siglent specification lists a lock time of < 2s implying that this is what they do.

I will loater check this agen but I think I have not made mistake. (also I have done external clock sweep (+/- 100kHz 10MHz) and equipment follow it. Internal TCXO do not follow it so it is overrided. Also TCXO adjust pin voltage looks like stay steady (1.52V)

I have tested this carefully agen.

10MHz reference output have allways internal reference frequency. Also if external reference is selected for use. 

In test
SDG5082
HW: 00-00-00-13-34
FW:5.01.01.07R1

If use external reference for many equipments and reference is chained via equipments this SDG need be last in chain. Of course this chaining is not recommended way to do it.
Normal and better way is distribution amplifier where all lines are also isolated from ground and each others.

If need external reference. This internal TCXO keeps it well inside specified +/-2ppm including initial error and if trust TCXO manufacturer datasheet, it also include long time drift.

[rf-loop]

There is  coming (slowly) lot of more test results about SDG5000 but it takes time becouse also tests need some revise before show for avoid bad mistakes and mostly it need double or triple tests with alternate methods or other check for better credibility.

[phatcenter77]

Here one medium resolution sample picture from Channel board output amplifiers.
Note that outputs GND is floating from chassis ground. (Max 42V but this can stop some ground loop currents between equipments).  Output power is 4 times Rigol 4000 example between 20MHz to 40MHz. (specs)

Soon I will continue tests after I have assembled unit exactly back to its original factory state.

Can anybody identify the ICs in the output stages in groups of 4? 

The single device in each channel is a VCA824, programmable gain amplifier, from TI:

http://www.ti.com/product/vca824

I googled the markings on the others, but haven't found anything...

[jpb]

Can anybody identify the ICs in the output stages in groups of 4? 
I googled the markings on the others, but haven't found anything...

They are op amps from TI (the data sheet says they are designed for arbitrary waveform generators amongst other things):

http://www.ti.com/product/ths3095

[rf-loop]

Some test about Square wave time jitter between 100ms - 100us period range.
(note that std dev result is perhaps wrong due to lack of enough resolution in HP53131A counter. It need Agilent 53230A or for more accurate result, becouse this jitter is so small)

Typical data collectoion time for single measurement was >5min due to dead time between time intervals. (N=10000)

But test give some imagine that it have quite low jitter.

(In one Siglent document sdev was measured using over 23MHz freq and there result was under 90ps)

[jpb]

Jitter is one area in which the Siglent and the Rigol DG4162 differ. The Rigol doesn't use comparators (I think) so the jitter is determined by the worse case of the sampling cycle period and the square wave period differing by half a sample spacing so that the rms jitter becomes one quarter of the sample rate or 500 psecs for a 500MS/s clock.

Siglent state 100 psecs rms jitter for both pulse and square (with a much worse 2nsec peak for arbitrary), this is consistent with using a comparator to generate square waves from sin waves as is done in the Agilent 33250.

[rf-loop]

Jitter is one area in which the Siglent and the Rigol DG4162 differ. The Rigol doesn't use comparators (I think) so the jitter is determined by the worse case of the sampling cycle period and the square wave period differing by half a sample spacing so that the rms jitter becomes one quarter of the sample rate or 500 psecs for a 500MS/s clock.

Siglent state 100 psecs rms jitter for both pulse and square (with a much worse 2nsec peak for arbitrary), this is consistent with using a comparator to generate square waves from sin waves as is done in the Agilent 33250.

Rigol specification about jitter is:
Square, Pulse and Arb:  (typical)
<5MHz  2ppm+500ps   rms 
>5MHz  500ps  rms
(and it do not tell just anything about real peak values (as usual with many manufacturers)

If only tell rms time jitter, it do not tell much about peak error.
If I give (bad) example 9996 pcs  1ms cycles perfectly  and then there is randomly 2 cycle 10ns  too long and 2 cycle 10 ns too short periods. What is rms jitter or sdev? Still minimum cycle time and maximum cycle time difference is 20ns (-peak to + peak).

500ps typical rms jitter is what seller want write and buyers read with dreams.
These some parameters about jitter distribution  are also good to know but still I need live between peak values.

SDG1000 series use comparator for produce square wave from internal sinewave, same sinewave what is used if output is sinewave. And it can see also in measured data extremely clear!

SDG5000 is different. I do not know exactly how square is produced.,  It can see also in this table and becouse this  it really can not be simple comparator method from sinewave - I think it is clear.
 
And more, these sdev values are not accurate due to HP53131A lack of resolution. I can only suspect that true sdev is  less. 

But, it is nice to see even some kind of test about Rigol DG4000.

Also, do it have 100ps setting resolution for rising or falling slope or same resolution for pulse width also with low frequencies.

----------------------------
Edit: Added:
I have measured also with other method. (but I have
But this is under rework becouse I suspect problem/error in this measurement. It need revise.

Please, do NOT TRUST this table. I have classified this junk status - so far.I suspect that this HP scope have some lack of accuracy if use long delay times. (lot of more delay time after trig point  than capture memory is, for show next rising edge. And perhaps this long delay time is not enough accurate??)


With short delay times it give totally different results and there measured sdev  is well under 100ps.

Also, it is not exactly as real cycle to cycle jitter measurement..
It is only time variations between two rising edges.

Later I will do new tests. 
Edit: False table removed. (there have been problem in test setup)
-----------------------------



This table what is made by using HP53131A is more reliable but it may give too bad sdev values but resoöution for this kind of test is too low.

[phatcenter77]

Can anybody identify the ICs in the output stages in groups of 4? 
I googled the markings on the others, but haven't found anything...

They are op amps from TI (the data sheet says they are designed for arbitrary waveform generators amongst other things):

http://www.ti.com/product/ths3095

Thank You.  I guess if I would have googled opamp 3095 I would have found that, I feel a bit foolish for not trying that haha.  Not surprising that they're using a THS series part from TI.

Great work on characterizing the performance of this AWG.