Author Topic: I think I got my first likely impossible design challenge...  (Read 4487 times)

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Offline technixTopic starter

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I think I got my first likely impossible design challenge...
« on: November 29, 2018, 08:49:20 pm »
Design challenge: a complete IBM PC XT compatible system using a stack of 8-bit PC/104 boards. Period correct components not required, i.e. modern CMOS versions of most main chips, NEC V20HL, 0603 SMT passives, 74HCT series logic in TSSOP and programmable logic in TQFP, AS6C4008 as main memory, etc. No more than 4 layers of copper allowed, but up to three layers of components allowed, including putting SMT components underneath DIP sockets and putting SMT components to the back side of the board.

Failure: Even with double side components and putting SMT components underneath DIP sockets allowed, even after condensing 82C88 and 82C84 into one EPM3064 CPLD, squeezing the three DIP-40 chips (80C88, 8087 and 80C37) and the 28C256 BIOS ROM chip into PC/104 is still likely impossible.

Mitigation: Maybe I should split the core complex, equivalent to the first few pages on the IBM PC/XT schematics, into two boards: 80C88 + 8087 + 82C88 + 82C84 + 82C59 on one board, 82C37 + AT28C256 + AS7C4008 + 82C53 + main CPLD on another. The two boards together implements the full ISA bus, and some additional pin headers would be used to link the internal signals together.
« Last Edit: November 29, 2018, 08:57:10 pm by technix »
 

Offline DC1MC

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Re: I think I got my first likely impossible design challenge...
« Reply #1 on: November 29, 2018, 09:05:25 pm »
I don't know, I have so many cool ideas and it's ultra difficult to find people to do a layout for me and here we have @technix doing challenges.
On topic put an AMG Geode chip, a Winbond flash and some SIMM RAM and here you are, instant PC :)
http://www.diamondsystems.com/images/products/pegasus/pegasus-top-enlarged.jpg

 Cheers,
 DC1MC
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #2 on: November 29, 2018, 09:09:15 pm »
I don't know, I have so many cool ideas and it's ultra difficult to find people to do a layout for me and here we have @technix doing challenges.
If the pay is good, I am happy to take it.

On topic put an AMG Geode chip, a Winbond flash and some SIMM RAM and here you are, instant PC :)
Can't really solder that and hard to source a reasonable BIOS... For that basic IBM compatible I cooked up myself I can take SeaBIOS and adjust it.
 

Offline tsman

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Re: I think I got my first likely impossible design challenge...
« Reply #3 on: November 29, 2018, 09:11:37 pm »
Are you allowed to use discontinued components? If so then look at the Faraday FE2010A which integrates most of an XT into a single chip. There are still a reasonable number of these chips available (pulls?) even though they were discontinued many years ago.
 

Offline DC1MC

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Re: I think I got my first likely impossible design challenge...
« Reply #4 on: November 29, 2018, 09:17:24 pm »
I'm sure that if the pay it's good there are many taker ;)

What I'm not sure is why it's difficult to solder the Geode, they are available both in BGA and socket A or 462, you can put it in a socket.

https://www.ebay.co.uk/itm/AMD-Geode-NX1500-1-0GHz-266-MHz-1500FGC3F-Socket-462-Socket-A-CPU-Processor-/152818724534

Now soldering the socket...  >:D
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #5 on: November 29, 2018, 09:20:12 pm »
Are you allowed to use discontinued components? If so then look at the Faraday FE2010A which integrates most of an XT into a single chip. There are still a reasonable number of these chips available (pulls?) even though they were discontinued many years ago.
Anything goes, as long as it 1) plays nice with 5V CMOS voltage levels and 2) is not unobtanium or too pricey on Taobao.

I'm sure that if the pay it's good there are many taker ;)
It is technically a third world country here in China, components can be cheap, and delivery will be cheap. My hourly rate might be about as much as your local freelancers, but the components and boards used would be cheaper.

Now soldering the socket...  >:D
Goalpost is shifted but not gone... Not helpful.
 

Offline tsman

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Re: I think I got my first likely impossible design challenge...
« Reply #6 on: November 29, 2018, 09:30:16 pm »
Anything goes, as long as it 1) plays nice with 5V CMOS voltage levels and 2) is not unobtanium or too pricey on Taobao.
Have a look at https://github.com/skiselev/micro_8088 (GPLv3) if so. It is one of Sergey Kiselev's retrocomputing projects using the FE2010A. Looks to implement what you need but the wrong form factor. All components are on single sided and through-hole so you've got some leeway in rearranging parts to fit a PC-104 card.
« Last Edit: November 29, 2018, 09:31:55 pm by tsman »
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #7 on: November 29, 2018, 09:44:58 pm »
Anything goes, as long as it 1) plays nice with 5V CMOS voltage levels and 2) is not unobtanium or too pricey on Taobao.
Have a look at https://github.com/skiselev/micro_8088 (GPLv3) if so. It is one of Sergey Kiselev's retrocomputing projects using the FE2010A. Looks to implement what you need but the wrong form factor. All components are on single sided and through-hole so you've got some leeway in rearranging parts to fit a PC-104 card.
Well I can just fold this board onto itself: The SRAM, 74F standard logic chips and the GAL16V8 can be replaced with SMT versions of the same SRAM, 74HCT standard logic and EPM3064 (that is a 3.3V CPLD with 5V tolerant I/O) and tuck those to the back of the board. Most of the bypass caps, as well as that PIC12F629 can be tucked under the socket using SMT packages. After that I might still have enough space on the bottom of the board to implement the three switch mode converters for 5V (TPS563201,) -5V (MC34063) and -12V (MC34063 too) rails from one barrel jack.
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #8 on: November 30, 2018, 05:22:39 am »
Anything goes, as long as it 1) plays nice with 5V CMOS voltage levels and 2) is not unobtanium or too pricey on Taobao.
Have a look at https://github.com/skiselev/micro_8088 (GPLv3) if so. It is one of Sergey Kiselev's retrocomputing projects using the FE2010A. Looks to implement what you need but the wrong form factor. All components are on single sided and through-hole so you've got some leeway in rearranging parts to fit a PC-104 card.
That FE2010A dream is likely dashed here: coating close to US$15 and hard to find here.
 

Offline ebastler

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Re: I think I got my first likely impossible design challenge...
« Reply #9 on: November 30, 2018, 06:58:50 am »
Failure: Even with double side components and putting SMT components underneath DIP sockets allowed, even after condensing 82C88 and 82C84 into one EPM3064 CPLD, squeezing the three DIP-40 chips (80C88, 8087 and 80C37) and the 28C256 BIOS ROM chip into PC/104 is still likely impossible.

Your challenge rules seem to allow for a lot of leeway. If a modern CPLD is allowed, you could also squeeze much more functionality (or the whole thing, actually) into an FPGA?
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #10 on: November 30, 2018, 09:17:07 am »
Failure: Even with double side components and putting SMT components underneath DIP sockets allowed, even after condensing 82C88 and 82C84 into one EPM3064 CPLD, squeezing the three DIP-40 chips (80C88, 8087 and 80C37) and the 28C256 BIOS ROM chip into PC/104 is still likely impossible.

Your challenge rules seem to allow for a lot of leeway. If a modern CPLD is allowed, you could also squeeze much more functionality (or the whole thing, actually) into an FPGA?
Cost is a factor for me: if I go the FPGA way it would cost at least as much as that FE2010A chip.

Since FE2010A is a bit expensive, I am going to use a two-board solution. 80C86 + 8087 + 82C59 + 82C84 + 82C88 + buffers on one board, 82C37 + AS6C4008 + 28C256 + CPLD on another..
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #11 on: November 30, 2018, 09:35:58 am »
So far the easiest board to design is the Multicom module: DM9000A Ethernet + CH375 USB + ST16C554 quad UART and a built-in USB serial permanently hooked to COM1. I think I have enough space to add even an OPL3 as Ad-Lib compatible sound. The point of adding USB and Ethernet is, for now, allowing BIOS to boot from USB sticks or pull boot images using PXE.

The next easiest board is XT-SATA: CPLD-based XT-IDE plus JMH330 IDE to SATA bridge on one board with a mSATA slot to implement a SSD hard card.

The CPU complex can be easier if I can find a cheap source for FE2010A, or it have to be a two-board stack.
 

Offline ebastler

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Re: I think I got my first likely impossible design challenge...
« Reply #12 on: November 30, 2018, 11:18:01 am »
Cost is a factor for me: if I go the FPGA way it would cost at least as much as that FE2010A chip.

Since FE2010A is a bit expensive, I am going to use a two-board solution. 80C86 + 8087 + 82C59 + 82C84 + 82C88 + buffers on one board, 82C37 + AS6C4008 + 28C256 + CPLD on another..

A Spartan-3 should be less than $10, for example.  And I would expect the cost of a two-board solution to easily offset a few $ savings on the chips?
But if you want 5V levels to the outside world, that might be a problem.
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #13 on: November 30, 2018, 04:06:22 pm »
Cost is a factor for me: if I go the FPGA way it would cost at least as much as that FE2010A chip.

Since FE2010A is a bit expensive, I am going to use a two-board solution. 80C86 + 8087 + 82C59 + 82C84 + 82C88 + buffers on one board, 82C37 + AS6C4008 + 28C256 + CPLD on another..

A Spartan-3 should be less than $10, for example.  And I would expect the cost of a two-board solution to easily offset a few $ savings on the chips?
But if you want 5V levels to the outside world, that might be a problem.
2-layer boards of PC/104 size costs $5 for five of them from JLC and they usually actually ship six of them. Even if I only use one out of the five boards from JLC anything more expensive than $5 is out. The only additional cost for spreading the components out to two boards other than that additional board is additional pin headers, which are dime a dozen anyway.
 

Offline T3sl4co1l

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Re: I think I got my first likely impossible design challenge...
« Reply #14 on: November 30, 2018, 04:55:34 pm »
Why so many classic chips when oodles of gate arrays solved that problem long ago?

From the same angle: might as well put in a VGA + SuperIO chip.  SoundBlaster too maybe? ;D

Tim
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Bringing a project to life?  Send me a message!
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #15 on: November 30, 2018, 05:14:31 pm »
Why so many classic chips when oodles of gate arrays solved that problem long ago?
I want to minimize the use of HDL on this board...

From the same angle: might as well put in a VGA + SuperIO chip.  SoundBlaster too maybe? ;D
Those are the goals of other boards on this system: FlexCGA for graphics, AdLib-compatible OPL3 (using genuine Yamaha YMF262) for audio, etc.

Speaking of, while that Faraday chip is unobtanium, the NEC V40HL is much more likely to have here, and they are available cheap, even fairly new actually. V40HL contains 80C88 + 82C88 + 82C84 + 82C59 + 82C37 in one chip (that 82C51 module would be left unused though as it conflicts pins with DMA 3, and I would use a ST16C554 instead for serial ports.) So the main board would be V40HL + 8087 + buffers + SRAM + some glue logic in one 5V CPLD like EPM7064S
 

Offline T3sl4co1l

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Re: I think I got my first likely impossible design challenge...
« Reply #16 on: November 30, 2018, 05:23:38 pm »
Why so many classic chips when oodles of gate arrays solved that problem long ago?
I want to minimize the use of HDL on this board...

I'd be dumbfounded if you can find the HDL for the classic gate arrays.  Or if the HDL they used is even usable today (without basically rewriting it from scratch, or lord forbid, re-entering the schematic from scratch, if they did that..), or if any of that HDL even still exists in any corporate database anywhere...

...i mean, this thing has all the buses and interfaces of a classic XT (to the best of my knowledge), but a fraction of the ICs, because they made their own gate arrays.  Mid 80s chips, nothing you need to know about beyond the pinout (which, you'd have to trace from whatever motherboard you, uh, "harvest" these from).
https://www.seventransistorlabs.com/Images/Amstrad_Mobo.jpg
four of 'em, guessing one or two for CPU interfaces, one for 8-bit bus interface, and the EGA chip.  There are probably even better integrated ones out there.

Or to put it another way: find a reasonably compact, contemporary motherboard (it might be a desktop or laptop), that is XT compatible, use the chips off it but remake the same motherboard circuit in a different form factor.

Tim
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Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #17 on: December 01, 2018, 04:09:33 am »
Why so many classic chips when oodles of gate arrays solved that problem long ago?
I want to minimize the use of HDL on this board...

I'd be dumbfounded if you can find the HDL for the classic gate arrays.  Or if the HDL they used is even usable today (without basically rewriting it from scratch, or lord forbid, re-entering the schematic from scratch, if they did that..), or if any of that HDL even still exists in any corporate database anywhere...

...i mean, this thing has all the buses and interfaces of a classic XT (to the best of my knowledge), but a fraction of the ICs, because they made their own gate arrays.  Mid 80s chips, nothing you need to know about beyond the pinout (which, you'd have to trace from whatever motherboard you, uh, "harvest" these from).
https://www.seventransistorlabs.com/Images/Amstrad_Mobo.jpg
four of 'em, guessing one or two for CPU interfaces, one for 8-bit bus interface, and the EGA chip.  There are probably even better integrated ones out there.

Or to put it another way: find a reasonably compact, contemporary motherboard (it might be a desktop or laptop), that is XT compatible, use the chips off it but remake the same motherboard circuit in a different form factor.

Tim
I don't have those gate arrays so my next best option is 5V-capable CPLD's like Intel MAX 7000S series and 5V-tolerant 3.3V CPLD's like Xilinx XC3000A series.

I am going for V40HL anyway, which is a smaller SMT chip, available almost brand new, and works almost like that Faraday chip and a V20 in one package.
 

Offline technixTopic starter

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Re: I think I got my first likely impossible design challenge...
« Reply #18 on: December 01, 2018, 02:36:26 pm »
So how do I construct a nRQ/nGT pin from minimum mode style HOLDRQ/HOLDGT pins? V40HL have all but a nRQ/nGT to support a 8087, but it does have HOLDRQ and HOLDGT.
 


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