Quantel Ramcorder - Digital Video RAM Store

[dexters_lab]

Just wanted to make a short post about my latest Quantel adventure as i thought some of you might find it interesting because it's certainly vintage!

The Ramcorder is a device that connects to a quantel paintbox (video painting system) that allows short video clips to be made.

It's connected to the paintbox by bt.601 digital video interfaces, either SDI or Parallel giving video in and out. The paintbox commands the Ramcorder to replay or record either single frames or real-time video through a RS232 control interface between the two.

The ramcorder was introduced in 1989 as a companion to the also new V-Series Quantel Paintbox and would have been used to generate TV graphics for large TV networks by rendering frames of video in non-realtime and writing them to the ramcorder where effects can be composited. The ramcorder can store 323 PAL or NTSC video frames (720*576 PAL / 720*488 NTSC) uncompressed in a YUV16 format.

Price i think would have been around £70,000 (after RAM prices settled in the early 1990s) so a Ramcorder + Paintbox system would have been around £140,000 when new.

Inside the chassis are six large PCBs; a CPU board, video i/o board and four ram store boards.

The CPU board contains a 6809 CPU, dual UART, diagnostics port, ROM and RAM.

The video i/o board contains logic to read/modify data within the store boards, there are also two add-on boards that generate the bt601 video data in parallel form using programmable logic (FPGA/CPLD) and also convert that to serial (SDI) video using ST Micro STV1601 & STV1602 serialiser/de-serialiser pairs.

The four store boards each contain 512 1megabit DRAMs making a total of 2048 in the system for 256MB total RAM. Ignoring the vias there are in excess of 10,000 through holes in the pcb.

There is also a short video on it on my youtube channel, looking inside and in use.

[timb]

I can’t be the only one to be more than a little turned on by that RAM board... Right? Unbelievably cool.

[Alex Eisenhut]

It's unbelievable to see so many ZIP chips on one board. In the early '90s I would have fainted at the sight; my Amiga 3000 had sockets for 32 of them and I thought I was hot stuff!

I remember the DRAM prices back then, I had to add memory a chunk at a time and figure out which ones would work. Something about fast page mode and whatever else back then not being compatible. EDO? Static column? Meh, who knows.

The chips look like the regular array you can see in the window of EPROMS...

[coppice]

In the mid 80s we bought a 192MB DRAM buffer box, filled with 256k DRAM chips - 6144 chips. It cost over 100k pounds.

[dexters_lab]

It is a bit of a bonkers device and so rare, it's amazing i managed to get one and have it working

Hopefully when i get a hang of the animation functions of my paintbox i can create some retro style intros for my channel with it

As for ram, EDO if i recall was about the same as FPM but could output data in blocks, or something like that so gave a performance increase on sequential reads. I am sure someone will remember!

[helius]

EDO is almost exactly the same as Fast Page Mode, but the output buffers stay active during the subsequent column access cycles (which gives the host more time to latch them and thus permits a faster access rate). See https://www.ece.cmu.edu/~ece548/localcpy/dramop.pdf

[Alex Eisenhut]

Was there a closeup of the logic chips on the RAM PCBs? How do you drive so many inputs?

[pieman103021]

Thanks a ton for sharing this! These types of finds are so cool to see.

[dexters_lab]

Was there a closeup of the logic chips on the RAM PCBs? How do you drive so many inputs?

Hmm good point, when i get back from my holidays in a couple of days i will grab some close up pics of that area

[james_s]

It's crazy that a board that large and dense would even work with the propagation delays, stray inductance and capacitance. Must have been fun trying to track down a bad RAM on one of those.

[glarsson]

It's crazy that a board that large and dense would even work with the propagation delays, stray inductance and capacitance. Must have been fun trying to track down a bad RAM on one of those.

I worked at a company designing and building advanced image processing systems between 1983 and 1987. Our systems had memory boards of this size. The difference was that we used the common DIP version of DRAM and that we filled a couple of 19" racks with memory boards.

I designed and built two test systems for these boards. One system doing burn in testing of a rack at a time and one system testing one board at a time. The smaller system was used to debug and repair faulty boards. The system could generate various patterns of accesses and then other test equipment such as a oscilloscope could be used to find the problems.

Expensive systems...

[dexters_lab]

It's crazy that a board that large and dense would even work with the propagation delays, stray inductance and capacitance. Must have been fun trying to track down a bad RAM on one of those.

i haven't had a chance to poke around and find the diagnostics menu that's built in, but i am pretty sure it has the ability to test and then indicate the physical location of faulty drams

[Alex Eisenhut]

I'd hate to be the guy stuck with removing one ZIP in the middle of the pack!

[james_s]

I suppose it depends on what else is on the board and how well thought out the test routine is, but in my experience repairing 70s-80s arcade boards it's common for the self test to indicate a bad RAM or ROM when the problem is actually in some other circuitry that interfaces with the RAM or ROM.

[dexters_lab]

Was there a closeup of the logic chips on the RAM PCBs? How do you drive so many inputs?

nearly forgot to do this!

[dexters_lab]

I'd hate to be the guy stuck with removing one ZIP in the middle of the pack!

yea, makes your eyes hurt trying to look at the solder side up close!!

interestingly, i have in total seven of the ram store boards, four in the machine and three spares. They all seem to be the same PCB revision but there are different bodge wires on a few, some stringing entire columns of the DRAMs... so i wonder if this was to correct different manufacturing defects in the PCB, bad connections etc?

it must have been a nightmare if they found a PCB defect after all those DRAMs were soldered in 

[Alex Eisenhut]

A long time ago I had a PC video card with some weird ZIP video RAM chips on it. I had to jam it into my Amiga 3000 and I bent a ZIP chip slightly because the A3000 is very small and tight inside.
I didn't like the look of the chip so I wanted to straighten it, and the body snapped off the leads.
Oops.

So I'd think that it would be tricky reaching in the middle of the pack without accidentally knocking other chips out.

Plus desoldering on such a dense board would need good heat transfer.

[james_s]

Given the cost of one of those boards, I suspect the techs that were allowed to work on them were the best available and knew all the tricks. I certainly would be nervous working on something that expensive.

[dexters_lab]

I didn't like the look of the chip so I wanted to straighten it, and the body snapped off the leads.

i feel your pain

my OCD goes mental when i look at this one, i really must resist straightening them!

[Alex Eisenhut]

I guess this is its father.



I love this stuff.

[mikeselectricstuff]

I love this stuff.

If you like that, you'll enjoy the Scanimate.
This use a CRT to display an image, with an analogue computer modifying the scan waveforms. The CRT was then recorded with a camera :   

 
https://en.wikipedia.org/wiki/Scanimate

[dexters_lab]

I guess this is its father.
I love this stuff.

kind of yes, that is a demo of the quantel mirage (the DVM-8000) which dates from 1982 in it's earliest form, it took live video and digitized it into a 1024x1024 bitmap where each pixel would have a 3d co-ordinate. That would then allow you to move those points anywhere. From what i understand about it the 3D co-ords were pre-rendered on some kind of VAX system and then passed to the DVM in 'real time' for it to then manipulate the incoming video

so the ramcorder and mirage do different things really, the mirage is really for live studio effects

interestingly the controller he's using in that video is from a DPE-5000 (a video effects unit from 1978), so i think there is some funky 'mock up for TV' going on there!

a DVM-8000 would be my quantel holy grail 

this video shows off the DVM a bit better

[dexters_lab]

scanimate is awesome, that Dave guy who keeps it running does a remarkable job making graphics on it and keeping it running.

[Alex Eisenhut]

this video shows off the DVM a bit better

OMG I. LOVE. THIS. STUFF!

It combines my favorite things, Jean Michel Jarre's Equinoxe V (which version? It sounds different from the album), and bright, simple, fun cheesy '80s graphics!

[dexters_lab]

mike oldfield bought a Mirage incidentally, he used it extensively on the Wind Chimes album from 1988, it's clearly a bit more advanced than that 1982 showreel, probably in improvements in the controller software i guess 

[Alex Eisenhut]

I like Mike Oldfield but he's been like a cafeteria for decades now: serving reheated leftovers.

But so has Jean Michel Jarre...

[dexters_lab]

I like Mike Oldfield but he's been like a cafeteria for decades now: serving reheated leftovers.

But so has Jean Michel Jarre...

yea, i know what you mean... Guitars is a nice change from his other works

[Willyarma]

Wow, I've only just found out about this! I've been watching a lot of your Quantel videos today and am absolultely blown away with what these devices were capable of considering how old they are! I'm very impressed with the repair jobs too, especially the PAL hacking!
That Mirage unit is something else! It blew my socks off, its incredible. It got me thinking if I could do something Mirage-ish with my last FPGA project which was an SRAM based live HDMI full HD roto-zoomer, I can address any pixel in any order. VIDs of it have been on youtube for about 4 months.

[dexters_lab]

Thanks, threre is more quantel magic on the way to the channel soon, i have been trying to coax a Quantel Hal into full life recently and it makes the Paintbox and Ramcorder look a bit basic really.

[mikeselectricstuff]

Wow, I've only just found out about this! I've been watching a lot of your Quantel videos today and am absolultely blown away with what these devices were capable of considering how old they are! I'm very impressed with the repair jobs too, especially the PAL hacking!
That Mirage unit is something else! It blew my socks off, its incredible. It got me thinking if I could do something Mirage-ish with my last FPGA project which was an SRAM based live HDMI full HD roto-zoomer, I can address any pixel in any order. VIDs of it have been on youtube for about 4 months.

If you can do any pixel in any order, presumably the next step is to have a pixel address lookup table so you could do any arbitary transformation. Size of LUT might be an issue though...

[dexters_lab]

nice videos (thank Mike for finding and posting)

yea that's just the sort of thing quantel were doing with the Mirage

most of the effects though that looked like that were done with switching and effects desks like those from grass valley and sony (amongst others), mirage didn't have a long life at quantel, there is almost no mention of it towards the end of the 80s it seems

[Willyarma]

Yeah, thers not much about it online.
(Those vids were mine BTW, when i first posted they got removed somehow so I went back and edited the post)
Ignoring the LUT size for the moment (which is a hurdle) a static image would be easy, but how on earth did they make it animate and turn etc.. was it hard coded in to the logic? I heard it was programmable but I have a hard time imagining a computer in the 1980s being able to calculate a 1024x1024 grid of dots at 50fps! Was it all pre calculated for every frame in a ginormous ram (seems crazy)? In my rotozoomer, all the fast stuff is hard coded into the logic of the FPGA, only the gradients and starting positions are changed externally to make it turn & zoom.

[james_s]

Hey that's pretty cool! Did you release the HDL for that? Looks like something that would be fun to play with.

[dexters_lab]

Yeah, thers not much about it online.
(Those vids were mine BTW, when i first posted they got removed somehow so I went back and edited the post)
Ignoring the LUT size for the moment (which is a hurdle) a static image would be easy, but how on earth did they make it animate and turn etc.. was it hard coded in to the logic? I heard it was programmable but I have a hard time imagining a computer in the 1980s being able to calculate a 1024x1024 grid of dots at 50fps! Was it all pre calculated for every frame in a ginormous ram (seems crazy)? In my rotozoomer, all the fast stuff is hard coded into the logic of the FPGA, only the gradients and starting positions are changed externally to make it turn & zoom.

i've been told the Mirage was a box that processed the video and had all the magic in but had a mini-computer that controlled it, i know Quantel used a lot of VAX stuff so could well have been a VAX. How the two communicated and how the computer calculated and stored all the 3D stuff i have no idea. If i ever happen upon details i will post them up.

[Willyarma]

Is there a pinout for the RAM store card?
Is the DRAM refresh circuitry on board?
It's got me wondering if it could be recreated with modern parts, it would be a doddle if its just address bus + data bus on the connector, I expect its a bit more complex than that though!

[dexters_lab]

Is there a pinout for the RAM store card?
Is the DRAM refresh circuitry on board?
It's got me wondering if it could be recreated with modern parts, it would be a doddle if its just address bus + data bus on the connector, I expect its a bit more complex than that though!

no, there is no pinout, i would have do make one... but  there is a picture on page 1 of this thread that shows a closeup of the bunch of logic at at the connector, that could be part of the refresh

We have looked at re-creating the entire ramcorder, it would actually be simpler to engineer it from the other way. The video in/out are SDI so that can easily be re-created then it's just a case of deciphering the rs232 protocol it uses. A tame fpga and a stick of old PC ram would suffice to replace the whole thing. I have wondered if the ramcorder tells the paintbox how many frames it has available which could potentially allow a replacement to have gigabytes of ram for a huge increase in video storage space.

I've never looked at the protocol though, i should get out my hantek LA and see what it says

[james_s]

It's pretty crazy to think of replacing that whole huge thing with a little board containing an FPGA and a stick of RAM.

[Willyarma]

Thats a much simpler and better idea!
I would love to see the protocol deciphered, i think it would make a great video.
I assume the SDI signal is 576i and not 576p?

I'm just reading Xilinx XAPP1076 - Implementing Triple-Rate SDI with Spartan-6 FPGA GTP Transceivers.... looks like SDI on FPGA is possible, its a big document though!

On a side note I remembered about some cheap HDMI to SDI and SDI to HDMI convertors that I saw on eBay (mainly used in CCTV) they might be handy for this system to use on a modern screen and to record etc.. but I dont think HDMI devices like 576i very much, so maybe not.

[Willyarma]

Hey that's pretty cool! Did you release the HDL for that? Looks like something that would be fun to play with.

Not for this one - at least not yet, it was so difficult to get right, one tiny change would throw out all the timing, I need to have another go with a different approach.

It's pretty crazy to think of replacing that whole huge thing with a little board containing an FPGA and a stick of RAM.

I know. I really like seeing moderen stuff made for old hardware and also the hacking and reverse engineering of the signals and protcols to get it to work is really interesting to me!

[dexters_lab]

right well i spent most of today with my LA on the serial link and made a bit of progress, i should have livestreamed it but didn't think about it at the time!

the link is RS232 at 9600bps 8/n/1, the protocol is simple, but more complex than i expected so it's work-in-progress. For example it takes 11 bytes from the paintbox to get the ramcorder to display a single frame. Even playing continuous video requires the paintbox to request every single frame in realtime.

the 323 frames limit looks to be hard coded into the paintbox software so probably no scope to expand it, i couldn't see anything that informs the paintbox the size of the storage.

the ramcorder can display and record not only individual frames but also individual fields of video, i spotted this in the protocol and verified it


to reply to your posts...

I assume the SDI signal is 576i and not 576p?

yes, the paintbox and ramcorder both are 576i. The interlace is entrenched in the paintbox design and i don't believe they ever offered progressive scan on this architecture.

looks like SDI on FPGA is possible, its a big document though!

we have SD-SDI running on a Cyclone 2 thanks to user OzOnE, again another unfinished project, maybe we'll brush the dust off it if i make more progress on the protocol

I would love to see the protocol deciphered, i think it would make a great video.

noted, once i make a bit more progress i will look at putting something together

On a side note I remembered about some cheap HDMI to SDI and SDI to HDMI convertors that I saw on eBay (mainly used in CCTV) they might be handy for this system to use on a modern screen and to record etc

thankfully i have a Blackmagic unit that will record SDI to a SSD as uncompressed video which can easily be converted on my PC. I also have a couple of really nice pro scalers and converters i picked up cheap off ebay, means i can convert pretty much any type of video in and out of the paintbox.

[dexters_lab]

if anyone is interested or maybe able to help?...

here is a little summary of what we found in the ramcorder protocol...

the paintbox sends a string of bytes to the ramcorder, the string can be variable length and includes a checksum, the replies back from the ramcorder are similar in they are variable length and have a checksum.

looking at this set of packets which happens when i enable the ramcorder option on the paintbox:
PB = Paintbox TX, RC= Ramcorder TX

Code: [Select]

PB: F7 53 09 50 08 12 00 00 00 43
RC: FC 41 01 07 08 12 00 00 00 04 01 43 09 4A 06
PB: F2 4B 0A 00 B9
RC: F2 41 01 04 C8
PB: F7 53 09 50 08 12 00 00 00 43
RC: FC 41 01 00 08 12 00 00 00 04 01 43 09 4A 0D
PB: F0 73 9D
RC: F5 41 01 00 00 05 00 00 C4
The first byte always has the upper 4 bits as 1, the lower 4 bits are the payload/string length excluding the first and last bytes. The last byte is a basic  checksum of the payload including the first byte.

So the first message from the Paintbox is:
FC 41 01 07 08 12 00 00 00 04 01 43 09 4A 06

FC = length 13 bytes
41 01 07 08 12 00 00 00 04 01 43 09 4A = string
06 = checksum of string including the first byte

Interestingly bytes 10 and 11 look like a 16 bit value 0x0143 which is 323, exactly the number of frames available in the ramcorder. So it could well be informing the paintbox of how many frames are available.

Reading/Writing frames & fields. Quantel call this buying and selling frames.

the following is the comms that are selling (writing) a frame to frame 1 of the ramcorder:

Code: [Select]

PB: FA 73 09 50 02 01 00 07 00 00 00 01 2F
RC: F5 41 01 00 05 00 01 C3
PB: F0 52 BE
RC: F2 41 01 00 CC
PB: F0 73 9D
RC: F5 41 01 00 05 00 01 C3
Selling a frame into frame 2 of the ramcorder:

Code: [Select]

PB: FA 73 09 05 02 01 00 07 00 02 00 03 2B
RC: F5 41 01 00 05 00 01 C3
PB: F0 52 BE
RC: F2 41 01 00 CC
PB: F0 73 9D
RC: F5 41 01 00 05 00 03 C1
Selling a frame into frame 5 of the ramcorder:

Code: [Select]

PB: FA 73 09 50 02 01 00 07 00 08 00 09 1F
RC: F5 41 01 00 05 00 07 BD
PB: F0 52 BE
RC: F2 41 01 00 CC
PB: F0 73 9D
RC: F5 41 01 00 05 00 09 BB
Buying frame 100 from the ramcorder:

Code: [Select]

PB: F8 50 02 00 00 07 00 C8 00 C9 1E
RC: F2 41 01 00 CC
PB: F0 73 9D
RC: F5 41 01 00 05 00 C9 FB
PB: F0 73 9D
RC: F5 41 01 00 05 00 C8 FC
Buying frame 103 from the ramcorder:

Code: [Select]

PB: F8 50 02 00 00 07 00 CC 00 CD 16
RC: F2 41 01 00 CC
PB: F0 73 9D
RC: F5 41 01 00 05 00 CD F7
PB: F0 73 9D
RC: F5 41 01 00 05 00 CC F8
As you can see this is not as simple as you would expect, i think the ramcorder is works more in video fields rather than whole frames and that the individual fields are bought and sold in separate operations?

You can see two counters, in the immediate example above for buying frame 103: bytes 6 to 9 seem to be frame/field counters. 0x00CC is 204 and 0x00cd is 205. If we assume the counter runs from 0-322 (rather than 1-323) then 204 could be frame 103 field 1 and 205 would be frame 103 field 2.

It doesn't all make sense much but that's where we are at.

[helius]

Yes, from the capture it does use field addresses. What's more: It seems that "selling" involves a command prefix to indicate that a descriptor will be used for writing, and "buying" just uses a bare descriptor. Look at

Code: [Select]

PB: FA 73 09 50 02 01 00 07 00 08 00 09 1Fvs

Code: [Select]

PB: F8 50 02 00 00 07 00 C8 00 C9 1E
Maybe 0x50 refers to the field format, 50Hz or PAL? Next byte is 0x02, which could mean number of fields in the descriptor. 0x01 could be direction (r/w) or something else. 0x07 possibly is a version or maybe means which port to use or a signal encoding.
All the replies with code 0x41 appear to be "Success" status, I think there would be something different if you requested a nonexisting field descriptor. 0x41 is ASCII 'A'.

[Willyarma]

I can see lots of patterns in it.

Looks like when selling frames the initial command is describing 2 fields, then the following is some kind of ack about the 2 fields with the 1/50 sec time difference maybe?
I'm not sure if its possible but having timestamps might help figure out if thats true.

How are you capturing this, is it using an RS232 cable or with your logic analyser? Because im puzzled about the line that reads F0 51 BE when selling frame 5, that line is F0 52 BE on the others, have we got a bit error there or is it correct?

Whilst on-site a few years ago I needed to view serial data as hex so threw together a quick VB program to capture serial and display it hex editor style, its been quite useful although I never polished it up. Is that any use to you?

The captures are good, but could do with more.
Can we see the same frame numbers bought and sold, and does it also do just fields too?

Oh and seeing the total number of frames available is very interesting indeed!

[dexters_lab]

thanks for the comments everyone 

helius certainly made me think about how the packets are formed

i am capturing with a Hantek 4032L logic analyser, the serial decode is a bit crap and there are sometimes errors from it and from me making typos so there could well be errors but i thought i checked all the checksums, but the 51 / 52 sounds like a typo from me!

It should also be noted there could well be some things that maybe legacy, there were devices around at the time that could read and write individual frames of video at the time that may share a similar protocol to the ramcorder. For example the write (sell) frame command seems to be saying 'seek to frame xxx' and then wait for an acknowledge, the next two commands are the write field 1 and then write field 2 of that frame. This could be allied to tape based systems.

Following that and picking up on Willyarma's comments about timing... yes i have omitted the timing info and there is for sure some interesting timing between the responses, i will try and detail these in some suitable form!

There are many many ways within the paintbox that generate buys and sells or generate other comms between the paintbox and ramcorder so it's hard to turn it all into a sensible post that you can understand without confusing things.

It really would be amazing to understand how it works, because the video in and out is SDI it could mean creating a replacement for the ramcorder with extended capacity a distinct possibility.

more info on the way...

[Willyarma]

I can see similarities between buying and selling, it looks like selling includes buying, like a combo.
When youre using the machine and selling a frame does it buy that same frame at the same time?

[dexters_lab]

here are some more captures...

i really need to work out a slicker way of getting this data, i have to manually type these across and work out the timing from the Hantek software which is utterly crap!

These first two are using the handheld quantel 'grip' which does a sell/buy/increment operation in one button press. Typically used for rotoscoping operations.

Sell frame 85, buy frame 86

Code: [Select]

  0MS   PB: FA 73 09 50 02 01 00 07 00 A8 00 A9 DF
 23MS   RC: F5 41 01 00 05 00 AD 17
 32MS   PB: F0 52 BE
 39MS   RC: F2 41 01 00 CC
 99MS   PB: F0 73 9D
108MS   RC: F5 41 01 00 05 00 A9 1B
117MS   PB: F8 50 01 00 00 07 00 AA 00 AB 5A
136MS   RC: F2 41 01 00 CC
199MS   PB: F0 73 9D
208MS   RC: F5 41 01 00 05 00 AA 1A
260MS   PB: F0 73 9D
268MS   RC: F5 41 01 00 05 00 AB 19
Sell frame 86, buy frame 87

Code: [Select]

  0MS   PB: FA 73 09 50 02 01 00 07 00 AA 00 AB DB
 23MS   RC: F5 41 01 00 05 00 A9 1B
 33MS   PB: F0 52 BE
 39MS   RC: F2 41 01 00 CC
 99MS   PB: F0 73 9D
108MS   RC: F5 41 01 00 05 00 AB 19
117MS   PB: F8 50 02 00 00 07 00 AC 00 AD 56
136MS   RC: F2 41 01 00 CC
199MS   PB: F0 73 9D
208MS   RC: F5 41 01 00 05 00 AC 18
260MS   PB: F0 73 9D
268MS   RC: F5 41 01 00 05 00 AD 17
Buying & selling individual fields:

Buy frame 91 field 1

Code: [Select]

  0MS   PB: F8 50 02 20 00 07 00 B3 00 B3 29
 20MS   RC: F2 41 01 00 CC
 80MS   PB: F0 73 9D
 87MS   RC: F5 41 01 00 05 00 B3 11
140MS   PB: F0 73 9D
148MS   RC: F5 41 01 00 05 00 B3 11
Buy frame 91 field 2

Code: [Select]

  0MS   PB: F8 50 02 20 00 07 00 B4 00 B4 27
 17MS   RC: F2 41 01 00 CC
 79MS   PB: F0 73 9D
 88MS   RC: F5 41 01 00 05 00 B4 10
140MS   PB: F0 73 9D
148MS   RC: F5 41 01 00 05 00 B4 10
Sell frame 250 field 1

Code: [Select]

  0MS   PB: FA 73 09 50 02 21 00 07 01 F2 01 F2 2A
 24MS   RC: F5 41 01 00 05 00 AB 19
 33MS   PB: F0 52 BE
 39MS   RC: F2 41 01 00 CC
 99MS   PB: F0 73 9D
108MS   RC: F5 41 01 00 05 01 F2 D1
Sell frame 250 field 2

Code: [Select]

  0MS   PB: FA 73 09 50 02 21 00 07 01 F3 01 F3 28
 24MS   RC: F5 41 01 00 05 01 F2 D1
 33MS   PB: F0 52 BE
 39MS   RC: F2 41 01 00 CC
 99MS   PB: F0 73 9D
108MS   RC: F5 41 01 00 05 01 F3 D0

[dexters_lab]

Looking at those latest data grabs... eg this buy part:

PB: F8 50 02 00 00 07 00 AC 00 AD 56
this is like the paintbox saying, select field 172 (frame 87 field 1) from the store to output to field 1 and select field 173 (frame 87 field 2) from the store and output to field 2

RC: F2 4A 01 00 CC
ramcorder acknowledges

PB: F0 73 9D
paintbox says display field 1

RC: F5 4A 01 00 05 00 AC 18
ramcorder acknowledges request and paintbox grabs field 1

PB: F0 73 9D
paintbox says display field 2

RC: F5 41 01 00 05 00 AD 17
ramcorder acknowledges request and paintbox grabs field 2


...so in the case of only buying a single field, the request is the same but the paintbox asks for both fields to be the same like here in this case with 0x00B3 in both field counters:
PB: F8 50 02 20 00 07 00 B3 00 B3 29

[Willyarma]

Awesome!
Thanks for the captures!
Is it RS232 or RS485?
If its RS232 then I would use 2 serial ports on my PC and tap off the transmit lines from the equipment leaving PC transmit disconnected so as not to mash the transmitters together!
I would gladly write a little VB program to capture the data for you if you need it!

[dexters_lab]

Awesome!
Thanks for the captures!
Is it RS232 or RS485?
If its RS232 then I would use 2 serial ports on my PC and tap off the transmit lines from the equipment leaving PC transmit disconnected so as not to mash the transmitters together!
I would gladly write a little VB program to capture the data for you if you need it!

it's rs232
it's a nice offer but i only have one USB->RS232 adaptor!

EDIT: just ordered another USB -> RS232 off ebay

An app that could concatenate the TX from the Paintbox and Ramcorder together would be perfect

i should also point out that OzOnE will be posting up shortly, he's been helping with this too and has the EPROM from the ramcorder in ADAPro for disassembly

[Willyarma]

I've done the GUI, I'll finish the actual code tonight.

[dexters_lab]

I've done the GUI, I'll finish the actual code tonight.

wow! thank you 

should be a useful tool, not just for this

[nali]

There are tools around that already do this. I used to do exactly that but can't remember the name of the program I used and the laptop I used is long dead now.

I couldn't find it after a quick Google trying to refresh my memory, but it did bring up a couple of things which might be of use

http://nicecircuits.com/dual-port-serial-terminal/
https://docs.microsoft.com/en-us/sysinternals/downloads/portmon

[dexters_lab]

OzOnE is a bit busy working on his own project at the moment, so he can't look at the EPROM code in the Ramcorder right now, i don't suppose anyone else here is versed in 6809 disassembly are they?

i have included all the details below if anyone feels inclined to take a look, this is really all we know at the moment:

CPU: 6809
SRAM: 0x0000 to 0x1FFF
EPROM: 0x8000 to 0xFFFF
Dual UART: SCN2681 mapped to 0x5000

[Willyarma]

Attached is my Visual Basic 2010 program called Q_Capture.
You can use 1 or 2 serial ports.
You can name each port so the report shows that name on each line.
The program looks for the F nibble to find the start and uses the count in the lower nibble so it can buffer the input until the end and then display it when the command is complete, so that if commands happen on both ports at the same time it will still print a full line that makes sense, and also to avoid confusion if the data also contains an F in the upper nibble.

I have only given it a quick test and it seems OK, but there still maybe bugs in it.
Please give it a try and let me know.

I can provide source if you want too.

[dexters_lab]

wow, what a great little tool!

ok, i just tried it and it's say data error for most of the time, i doubt it's your app... it'll be my setup for sure.

Code: [Select]

Data error, expected high nibble to be F 05
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 02
Data error, expected high nibble to be F C2
RC 08:40:45.0254 F2 41 01 00 F6
Data error, expected high nibble to be F 05
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 0A
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 05
Data error, expected high nibble to be F 00
Data error, expected high nibble to be F 04
PB 08:40:45.1190 FF 05 0A 00 05 00 04 FF F2 41 01 00 F6 05 0A 00 05 00
Data error, expected high nibble to be F 06
It makes me wonder if my hantek captures that showed the high nibble of the first byte to always be F might be in error, could you disable that data check so i can do some checking as to why this new method shows different data?

whatever i do i am getting erratic data even using terminal emulators, turning on even parity seems to help though if i use my other terminal emulator but doesn't in the q_capture app, does your app override the default settings for stuff like parity  that i set in device mangler?

[Willyarma]

I have added the ability to change baud, data bits, stop bits and parity.
I've not disabled the F check yet as that needs more thought as I'm relying on it to know where to insert the timestamp and start a new line etc..

[dexters_lab]

wow, that was quick!

looks much better now, though i don't get anything from port 2... there is definitely data coming in on com4 though i can see it if i open it in my terminal emulator

[Willyarma]

Sorry, I made a typo, the serial port 2 handler was reading port 1!

[dexters_lab]

awesome, thanks!

i am out for the remainder of today so i'll take a look at it tomorrow.

[PA0PBZ]

Looks like there is some kind of diagnostics in there:

Code: [Select]


ROM:A1A0 0000001A C CAROUSEL Diagnostics Menu                                                     
ROM:A1BA 00000027 C Uxx        Bidi Bus Read Of Address xx                                         
ROM:A1E1 00000028 C /yy        Bidi Bus Write yy To Last xx                                       
ROM:A209 00000032 C T          Toggle Test Probes or Store Difference                             
ROM:A23B 00000022 C NN         Show Input Source List                                             
ROM:A25D 00000033 C Nx,NLx,NCx Select Input Source on Both/Luma/Chroma                             
ROM:A290 0000002B C G          Toggle Parallel (GPI) Port Test                                     
ROM:A2BB 0000001F C Y          Toggle Store Bypass                                                 
ROM:A2DA 00000050 C Zx         Zit Test 0=(All)/1st/2nd Half Store; 1,2 Skip Mid Fld and Transients
ROM:A32A 00000035 C ZY         Zit Test All Store, Loop, counting errors                           
ROM:A35F 0000003D C ZZ         Zit Test All Store, Loop, stopping at first error                   
ROM:A39C 0000001D C J          Toggle Paint Task                                                   
ROM:A3B9 00000020 C K          Toggle Parallel Task                                               
ROM:A3D9 0000001F C I          Toggle Test Display                                                 
ROM:A3F8 00000018 C ?          This Message                                                       
ROM:A410 0000001A C X          Reset Software                                                     
ROM:A42A 0000001E C P          Play Forward Frame                                                 
ROM:A448 00000031 C S          Stop Play/Record; Cancel Position (H)                               
ROM:A479 00000018 C V          Play Reverse                                                       
ROM:A491 00000020 C Q          Record Forward Frame                                               
ROM:A4B1 0000003A C <or>       Step Forward or Backward (outputs field count)                     
ROM:A4EB 0000002C C Hxxx       Pos to Field xxx and Simul Rd/Wr                                   
ROM:A517 0000001E C Lxxx       Look at Field xxx                                                   
ROM:A535 00000021 C O          Play This Half (Loop)                                               


[Willyarma]

I've found a 6809 emulator written in C on github, I've altered it to print reads and writes to non memory areas....

It does this:

Read from 5100 write 0 to 500d write 0 to 5004 write 0 to 5005 write 0 to 5414 Read from 500f write ff to 5006 write ff to 5007 write 30 to 5004 write 0 to 5005 Read from 500e Read from 500d write 2 to 5005 write 0 to 5005 write 20 to 5005 write 0 to 5005 write 0 to 5409 write 0 to 5408 write 0 to 5407 write 0 to 5406 write 0 to 5405 write 0 to 5404 write 0 to 5403 write 0 to 5402 write 0 to 5400 write 80 to 5401 write c8 to 5411 write 0 to 5412 write 0 to 5413 write c8 to 5411 write 31 to 5004 write 80 to 5005 Read from 5410 write f to 5414 Read from 5100 Read from 5006 Read from 5007 Read from 5006 write 1a to 5002 write 2a to 5002 write 3a to 5002 write 4a to 5002 write 5a to 5002 write 0 to 500d write 65 to 500f write 80 to 5005 Read from 5100 Read from 5006 Read from 5007 Read from 5006 write 1a to 500a write 2a to 500a write 3a to 500a write 4a to 500a write 5a to 500a write 0 to 500d write 96 to 500f write 80 to 5005 Read from 5100 Read from 5006 Read from 5007 Read from 5006 Read from 5100 Read from 5006 Read from 5007 Read from 5006 Read from 5100 Read from 5006 Read from 5007 Read from 5006 Read from 5100 Read from 5006 Read from 5007 Read from 5006 Read from 5100.....

All values are in hex.

Not much use yet i guess

[Willyarma]

Attached is a dissasembly.
Code starts at 0x8000
Interrupt routine starts at 0x866F, looks like it might handle received RS232

[dexters_lab]

Looks like there is some kind of diagnostics in there:

Code: [Select]


ROM:A1A0 0000001A C CAROUSEL Diagnostics Menu                                                     
ROM:A1BA 00000027 C Uxx        Bidi Bus Read Of Address xx                                         
ROM:A1E1 00000028 C /yy        Bidi Bus Write yy To Last xx                                       
ROM:A209 00000032 C T          Toggle Test Probes or Store Difference                             
ROM:A23B 00000022 C NN         Show Input Source List                                             
ROM:A25D 00000033 C Nx,NLx,NCx Select Input Source on Both/Luma/Chroma                             
ROM:A290 0000002B C G          Toggle Parallel (GPI) Port Test                                     
ROM:A2BB 0000001F C Y          Toggle Store Bypass                                                 
ROM:A2DA 00000050 C Zx         Zit Test 0=(All)/1st/2nd Half Store; 1,2 Skip Mid Fld and Transients
ROM:A32A 00000035 C ZY         Zit Test All Store, Loop, counting errors                           
ROM:A35F 0000003D C ZZ         Zit Test All Store, Loop, stopping at first error                   
ROM:A39C 0000001D C J          Toggle Paint Task                                                   
ROM:A3B9 00000020 C K          Toggle Parallel Task                                               
ROM:A3D9 0000001F C I          Toggle Test Display                                                 
ROM:A3F8 00000018 C ?          This Message                                                       
ROM:A410 0000001A C X          Reset Software                                                     
ROM:A42A 0000001E C P          Play Forward Frame                                                 
ROM:A448 00000031 C S          Stop Play/Record; Cancel Position (H)                               
ROM:A479 00000018 C V          Play Reverse                                                       
ROM:A491 00000020 C Q          Record Forward Frame                                               
ROM:A4B1 0000003A C <or>       Step Forward or Backward (outputs field count)                     
ROM:A4EB 0000002C C Hxxx       Pos to Field xxx and Simul Rd/Wr                                   
ROM:A517 0000001E C Lxxx       Look at Field xxx                                                   
ROM:A535 00000021 C O          Play This Half (Loop)                                               


thanks, we had spotted it before... we're just not sure how to access it!

[Willyarma]

Somethings bugging me, if the UART starts at 0x5000, then I would expect the UART data holding registers to be at 0x5003 or 0x500B but theres nothing in disassembly that reads or writes there!
Have you any details on how the address bus is wired between the 6809 and UART?

[james_s]

I wouldn't be surprised if the addresses are not fully decoded, causing some peripherals to appear at multiple memory locations. I've seen that with some 80s arcade game hardware.

[Willyarma]

The memory locations directly accessed are:
M5000
M5001
M5002

M5004
M5005
M5006
M5007
M5008
M5009
M500A

M500D
M500E
M500F

I've not looked for any indirect access.
Why are the 2 ones that (ought to) actually receive and transmit characters missing!
Are there any swappages on the 4 address lines between the 6809 and UART?

Also there is another interrupt handler at 0x8234 in addition to the 0x886F that I mentioned before.
I could do with knowing which interrupt pin the UART is connected to.

[dexters_lab]

Sorry, I made a typo, the serial port 2 handler was reading port 1!

app looks to be working great

this is a grab of me enabling the ramcorder, then buying / selling some frames, making a few settings changes etc

i was just testing the app works ok, next time i'll make a video of what i am doing

there's a couple of little tweaks to the app i might suggest...
the new log appears at the bottom of the list of captured commands, but whenever it's updated it scrolls to the top meaning i have to keep scrolling to the bottom to see the latest data

anyway, more to come and i'll try and get ash to post about the uart mapping

Code: [Select]

PB 08:39:50.6756 F7 53 09 50 08 12 00 00 00 43
RC 08:39:50.6996 FC 41 01 00 08 12 00 00 00 04 01 43 09 4A 0D
PB 08:39:50.7056 F2 4B 0A 00 B9
RC 08:39:50.7206 F2 41 01 04 C8
PB 08:39:50.7326 F7 53 09 50 08 12 00 00 00 43
RC 08:39:50.7586 FC 41 01 00 08 12 00 00 00 04 01 43 09 4A 0D
PB 08:39:50.7626 F0 73 9D
RC 08:39:50.7756 F5 41 01 00 05 00 34 90
PB 08:39:57.6180 F8 50 02 00 00 07 00 32 00 33 4A
RC 08:39:57.6280 F2 41 01 00 CC
PB 08:39:57.7470 F8 50 02 00 00 07 00 32 00 33 4A
RC 08:39:57.7610 F2 41 01 00 CC
PB 08:39:57.8170 F0 73 9D
RC 08:39:57.8320 F5 41 01 00 05 00 33 91
PB 08:40:10.2697 FA 73 09 50 02 01 00 07 00 32 00 33 CB
RC 08:40:10.2877 F5 41 01 00 05 00 30 94
PB 08:40:10.2917 F0 52 BE
RC 08:40:10.2997 F2 41 01 00 CC
PB 08:40:10.3577 F0 73 9D
RC 08:40:10.3698 F5 41 01 00 05 00 32 92
PB 08:40:10.3828 F8 50 02 00 00 07 00 34 00 35 46
RC 08:40:10.3938 F2 41 01 00 CC
PB 08:40:10.4378 F0 73 9D
RC 08:40:10.4528 F5 41 01 00 05 00 34 90
PB 08:40:10.4988 F0 73 9D
RC 08:40:10.5128 F5 41 01 00 05 00 35 8F
PB 08:40:12.2499 FA 73 09 50 02 01 00 07 00 34 00 35 C7
RC 08:40:12.2679 F5 41 01 00 05 00 33 91
PB 08:40:12.2749 F0 52 BE
RC 08:40:12.2809 F2 41 01 00 CC
PB 08:40:12.3379 F0 73 9D
RC 08:40:12.3499 F5 41 01 00 05 00 35 8F
PB 08:40:12.3629 F8 50 02 00 00 07 00 36 00 37 42
RC 08:40:12.3739 F2 41 01 00 CC
PB 08:40:12.4179 F0 73 9D
RC 08:40:12.4329 F5 41 01 00 05 00 37 8D
PB 08:40:12.4789 F0 73 9D
RC 08:40:12.4929 F5 41 01 00 05 00 36 8E
PB 08:40:14.3900 FA 73 09 50 02 01 00 07 00 36 00 37 C3
RC 08:40:14.4080 F5 41 01 00 05 00 34 90
PB 08:40:14.4160 F0 52 BE
RC 08:40:14.4230 F2 41 01 00 CC
PB 08:40:14.4780 F0 73 9D
RC 08:40:14.4930 F5 41 01 00 05 00 36 8E
PB 08:40:14.5060 F8 50 02 00 00 07 00 38 00 39 3E
RC 08:40:14.5180 F2 41 01 00 CC
PB 08:40:14.5780 F0 73 9D
RC 08:40:14.5930 F5 41 01 00 05 00 39 8B
PB 08:40:14.6390 F0 73 9D
RC 08:40:14.6530 F5 41 01 00 05 00 38 8C
PB 08:40:16.4301 FA 73 09 50 02 01 00 07 00 38 00 39 BF
RC 08:40:16.4481 F5 41 01 00 05 00 36 8E
PB 08:40:16.4521 F0 52 BE
RC 08:40:16.4601 F2 41 01 00 CC
PB 08:40:16.5181 F0 73 9D
RC 08:40:16.5331 F5 41 01 00 05 00 38 8C
PB 08:40:16.5461 F8 50 02 00 00 07 00 3A 00 3B 3A
RC 08:40:16.5571 F2 41 01 00 CC
PB 08:40:16.6181 F0 73 9D
RC 08:40:16.6331 F5 41 01 00 05 00 3B 89
PB 08:40:16.6791 F0 73 9D
RC 08:40:16.6931 F5 41 01 00 05 00 3A 8A
PB 08:40:18.2902 FA 73 09 50 02 01 00 07 00 3A 00 3B BB
RC 08:40:18.3082 F5 41 01 00 05 00 39 8B
PB 08:40:18.3132 F0 52 BE
RC 08:40:18.3222 F2 41 01 00 CC
PB 08:40:18.3782 F0 73 9D
RC 08:40:18.3932 F5 41 01 00 05 00 3B 89
PB 08:40:18.4062 F8 50 02 00 00 07 00 3C 00 3D 36
RC 08:40:18.4172 F2 41 01 00 CC
PB 08:40:18.4782 F0 73 9D
RC 08:40:18.4932 F5 41 01 00 05 00 3C 88
PB 08:40:18.5392 F0 73 9D
RC 08:40:18.5532 F5 41 01 00 05 00 3D 87
PB 08:40:20.3903 FA 73 09 50 02 01 00 07 00 3C 00 3D B7
RC 08:40:20.4083 F5 41 01 00 05 00 3A 8A
PB 08:40:20.4133 F0 52 BE
RC 08:40:20.4233 F2 41 01 00 CC
PB 08:40:20.4783 F0 73 9D
RC 08:40:20.4933 F5 41 01 00 05 00 3C 88
PB 08:40:20.5063 F8 50 02 00 00 07 00 3E 00 3F 32
RC 08:40:20.5173 F2 41 01 00 CC
PB 08:40:20.5783 F0 73 9D
RC 08:40:20.5933 F5 41 01 00 05 00 3F 85
PB 08:40:20.6393 F0 73 9D
RC 08:40:20.6533 F5 41 01 00 05 00 3E 86
PB 08:40:23.6905 FA 73 09 50 02 01 00 07 00 3E 00 3F B3
RC 08:40:23.7085 F5 41 01 00 05 00 3D 87
PB 08:40:23.7145 F0 52 BE
RC 08:40:23.7245 F2 41 01 00 CC
PB 08:40:23.7785 F0 73 9D
RC 08:40:23.7905 F5 41 01 00 05 00 3F 85
PB 08:40:23.8035 F8 50 02 00 00 07 00 40 00 41 2E
RC 08:40:23.8145 F2 41 01 00 CC
PB 08:40:23.8585 F0 73 9D
RC 08:40:23.8725 F5 41 01 00 05 00 41 83
PB 08:40:23.9195 F0 73 9D
RC 08:40:23.9325 F5 41 01 00 05 00 40 84
PB 08:40:25.6506 FA 73 09 50 02 01 00 07 00 40 00 41 AF
RC 08:40:25.6686 F5 41 01 00 05 00 3F 85
PB 08:40:25.6756 F0 52 BE
RC 08:40:25.6816 F2 41 01 00 CC
PB 08:40:25.7386 F0 73 9D
RC 08:40:25.7506 F5 41 01 00 05 00 41 83
RC 08:40:25.7746 F2 41 01 00 CC
PB 08:40:25.8186 F0 73 9D
RC 08:40:25.8326 F5 41 01 00 05 00 43 81
PB 08:40:25.8796 F0 73 9D
RC 08:40:25.8936 F5 41 01 00 05 00 42 82
PB 08:40:29.0708 FA 73 09 50 02 01 00 07 00 42 00 43 AB
RC 08:40:29.0888 F5 41 01 00 05 00 40 84
PB 08:40:29.0958 F0 52 BE
RC 08:40:29.1038 F2 41 01 00 CC
PB 08:40:29.1588 F0 73 9D
RC 08:40:29.1738 F5 41 01 00 05 00 42 82
PB 08:40:29.1868 F8 50 02 00 00 07 00 44 00 45 26
RC 08:40:29.1988 F2 41 01 00 CC
PB 08:40:29.2588 F0 73 9D
RC 08:40:29.2728 F5 41 01 00 05 00 45 7F
PB 08:40:29.3198 F0 73 9D
RC 08:40:29.3328 F5 41 01 00 05 00 44 80
PB 08:40:31.9820 F0 73 9D
RC 08:40:31.9960 F5 41 01 00 05 00 45 7F
PB 08:40:40.0955 F8 50 02 00 00 07 00 00 00 01 AE
RC 08:40:40.1085 F2 41 01 00 CC
PB 08:40:40.2295 F8 50 02 00 00 07 00 00 00 01 AE
RC 08:40:40.2425 F2 41 01 00 CC
PB 08:40:40.2995 F0 73 9D
RC 08:40:40.3135 F5 41 01 00 05 00 01 C3
PB 08:40:44.7177 F0 73 9D
RC 08:40:44.7317 F5 41 01 00 05 00 00 C4
PB 08:40:44.7397 F0 73 9D
RC 08:40:44.7537 F5 41 01 00 05 00 01 C3
PB 08:40:48.3359 F0 73 9D
RC 08:40:48.3499 F5 41 01 00 05 00 01 C3
PB 08:40:50.3070 F8 50 02 00 00 07 00 00 00 01 AE
RC 08:40:50.3210 F2 41 01 00 CC
PB 08:40:50.3800 F0 73 9D
RC 08:40:50.3940 F5 41 01 00 05 00 01 C3
PB 08:40:50.4400 F0 73 9D
RC 08:40:50.4550 F5 41 01 00 05 00 00 C4
PB 08:40:51.7591 FA 73 09 50 02 00 00 07 00 00 00 31 00
RC 08:40:51.7741 F5 41 01 00 05 00 00 C4
PB 08:40:51.7831 F0 56 BA
RC 08:40:51.7931 F2 41 01 00 CC
PB 08:40:51.8801 F0 73 9D
RC 08:40:51.8941 F5 41 01 00 05 00 02 C2
PB 08:40:51.9401 F0 73 9D
RC 08:40:51.9541 F5 41 01 00 05 00 05 BF
PB 08:40:52.0001 F0 73 9D
RC 08:40:52.0141 F5 41 01 00 05 00 08 BC
PB 08:40:52.0601 F0 73 9D
RC 08:40:52.0741 F5 41 01 00 05 00 0B B9
PB 08:40:52.1201 F0 73 9D
RC 08:40:52.1341 F5 41 01 00 05 00 0E B6
PB 08:40:52.1801 F0 73 9D
RC 08:40:52.1941 F5 41 01 00 05 00 11 B3
PB 08:40:52.2401 F0 73 9D
RC 08:40:52.2551 F5 41 01 00 05 00 14 B0
PB 08:40:52.3001 F0 73 9D
RC 08:40:52.3151 F5 41 01 00 05 00 17 AD
PB 08:40:52.3602 F0 73 9D
RC 08:40:52.3752 F5 41 01 00 05 00 1A AA
PB 08:40:52.4202 F0 73 9D
RC 08:40:52.4352 F5 41 01 00 05 00 1D A7
PB 08:40:52.4802 F0 73 9D
RC 08:40:52.4962 F5 41 01 00 05 00 20 A4
PB 08:40:52.5402 F0 73 9D
RC 08:40:52.5552 F5 41 01 00 05 00 23 A1
PB 08:40:52.6002 F0 73 9D
RC 08:40:52.6162 F5 41 01 00 05 00 26 9E
PB 08:40:52.6602 F0 73 9D
RC 08:40:52.6752 F5 41 01 00 05 00 29 9B
PB 08:40:52.7202 F0 73 9D
RC 08:40:52.7362 F5 41 01 00 05 00 2C 98
PB 08:40:52.7802 F0 73 9D
RC 08:40:52.7962 F5 41 01 00 05 00 2F 95
PB 08:40:52.8402 F0 73 9D
RC 08:40:52.8562 F5 41 01 00 05 00 30 94


[Willyarma]

Glad it's working   

I have changed the textbox code to append rather than replace and it scrolls nicely now.

[PA0PBZ]

Somethings bugging me, if the UART starts at 0x5000, then I would expect the UART data holding registers to be at 0x5003 or 0x500B but theres nothing in disassembly that reads or writes there!

I thought it was me seeing the same thing, no references to TX or RX FIFO for channel A or B:

Code: [Select]

UART:5000                          ; segment UART
UART:5000                          org $5000
UART:5000 ??       MODE_A:         rmb 1                   ; DATA XREF: ROM:B2ECw
UART:5000                                                  ; ROM:B2F1w ...
UART:5000                                                  ; mc2681 Dual UART
UART:5001 ??       SRA_CSRA:       rmb 1                   ; DATA XREF: ROM:B2F6w
UART:5001                                                  ; ROM:C893w ...
UART:5002 ??       BRG_CMD_A:      rmb 1                   ; DATA XREF: ROM:8F62w
UART:5002                                                  ; ROM:8F67w ...
UART:5003 ??       RHRA_THRA:      rmb 1
UART:5004 ??       IPCR_ACR:       rmb 1                   ; DATA XREF: sub_8052+Aw
UART:5004                                                  ; sub_81BE+33w ...
UART:5005 ??       ISR_IMR:        rmb 1                   ; DATA XREF: sub_8052+10w
UART:5005                                                  ; sub_81BE+3Ew ...
UART:5006 ??       CTU_CTUR:       rmb 1                   ; DATA XREF: sub_81BE+1Dw
UART:5006                                                  ; sub_866F+6r ...
UART:5007 ??       CTL_CTLR:       rmb 1                   ; DATA XREF: sub_81BE+20w
UART:5007                                                  ; sub_866F+9r ...
UART:5008 ??       MODE_B:         rmb 1                   ; DATA XREF: ROM:B3BEw
UART:5008                                                  ; ROM:B3C3w ...
UART:5009 ??       SRB_CSRB:       rmb 1                   ; DATA XREF: ROM:B3C8w
UART:5009                                                  ; ROM:C95Aw ...
UART:500A ??       X1_X16_CRB:     rmb 1                   ; DATA XREF: ROM:8FEFw
UART:500A                                                  ; ROM:8FF4w ...
UART:500B ??       RHRB_THRB:      rmb 1
UART:500C ??       RESERVED:       rmb 1
UART:500D ??       INP_OPCF:       rmb 1                   ; DATA XREF: sub_8052+4w
UART:500D                                                  ; ROM:8F85w ...
UART:500E ??       STARTC:         rmb 1                   ; DATA XREF: sub_81BE+41r
UART:500E                                                  ; ROM:loc_9C80w ...
UART:500F ??       STOPC:          rmb 1                   ; DATA XREF: sub_81BE+18r
UART:500F                                                  ; ROM:8F8Cw ...
UART:500F          ; end of 'UART'


[Willyarma]

What tool are you using? looks quite handy

[Willyarma]

Not totally sure but I think UART RX/TX register is accessed indirectly, looks like base address of UART is put in memory at 0x0016.
Look at code at 0xBF88 for transmitting.

Also not sure why but it looks like some of the code repeats itself about 4 times, but its not simple repitition, it dosent line up with reading a 4K ROM as a 16K ROM for example.

[PA0PBZ]

What tool are you using? looks quite handy

This is IDA, the only tool

I found the same 0x16 address, but the problem is that it not always contains 0x5000 and I cant' understand why they would do that while all other registers in the UART are addressed directly.
If out are looking for transmit have a look at 0x9D79, here they transmit CR/LF using sub 0x844E, which I of course called S_BYTE_OUT:

Code: [Select]

ROM:9D79 86 0D                    lda     #$D
ROM:9D7B 36 02                    pshu    a
ROM:9D7D BD 84 4E                 jsr     S_BYTE_OUT
ROM:9D80 86 0A                    lda     #$A
ROM:9D82 36 02                    pshu    a
ROM:9D84 BD 84 4E                 jsr     S_BYTE_OUT
ROM:9D87 39                       rts


Code: [Select]

ROM:844E          S_BYTE_OUT:
ROM:844E 8E 08 C7                 ldx     #$8C7
ROM:8451 10 8E 0C+                ldy     #$CC7
ROM:8455 1F B9                    tfr     dp, b
ROM:8457 C1 02                    cmpb    #2
ROM:8459 26 07                    bne     loc_8462
ROM:845B 8E 0C C8                 ldx     #$CC8
ROM:845E 10 8E 10+                ldy     #$10C8
ROM:8462
ROM:8462          loc_8462:
ROM:8462 34 01                    pshs    cc
ROM:8464 1A 10                    orcc    #$10
ROM:8466 DC 0A                    ldd     byte_A
ROM:8468 83 00 01                 subd    #1
ROM:846B 9C 0A                    cmpx    byte_A
ROM:846D 2D 02                    blt     loc_8471
ROM:846F 1F 20                    tfr     y, d
ROM:8471          loc_8471:
ROM:8471 10 93 08                 cmpd    byte_8
ROM:8474 27 25                    beq     loc_849B
ROM:8476 DD 0A                    std     byte_A
ROM:8478 34 20                    pshs    y
ROM:847A 1F 02                    tfr     d, y
ROM:847C 37 02                    pulu    a
ROM:847E A7 A4                    sta     ,y
ROM:8480 1F 20                    tfr     y, d
ROM:8482 35 20                    puls    y
ROM:8484 83 00 01                 subd    #1
ROM:8487 9C 0A                    cmpx    byte_A
ROM:8489 26 02                    bne     loc_848D
ROM:848B 1F 20                    tfr     y, d
ROM:848D          loc_848D
ROM:848D 10 93 08                 cmpd    byte_8
ROM:8490 27 04                    beq     loc_8496
ROM:8492 5F                       clrb
ROM:8493 35 01                    puls    cc
ROM:8495 39                       rts
ROM:8496          loc_8496:
ROM:8496 C6 01                    ldb     #1
ROM:8498 35 01                    puls    cc
ROM:849A 39                       rts
ROM:849B          loc_849B:
ROM:849B 37 02                    pulu    a
ROM:849D C6 FF                    ldb     #$FF
ROM:849F 35 01                    puls    cc
ROM:84A1 39                       rts
ROM:84A1          ; End of function S_BYTE_OUT

I'm having a hard time to follow the BYTE_OUT, mostly because I'm not used to 6809 at all.
It looks like the byte is placed in another buffer and I guess this buffer is then read by the transmit buffer empty interrupt, but it is well hidden for now...

[dexters_lab]

video of capturing the serial data, the data is attached as a text file

[Willyarma]

Right at the start of the video, you pressed buy and the paintbox only sent the F0 73 9D command, and nothing else.
The ramcorder answered with F5 41 01 00 05 00 00 C4 which looks like it saying its on frame 0

Then when you changed buy to 2, the paintbox just sent the F0 73 9D command again.
The ramcorder answered with F5 41 01 00 05 00 01 C3 which is different to before, frame 1

Its interesting how the 73 command with no parameters could make the ramcorders response change.

What happens if you just keep dong that repeatedly?
Also would be interesting to see what happens if you manually send F0 73 9D a few times, does it toggle, count up or what?

[dexters_lab]

Right at the start of the video, you pressed buy and the paintbox only sent the F0 73 9D command, and nothing else.
The ramcorder answered with F5 41 01 00 05 00 00 C4 which looks like it saying its on frame 0

Then when you changed buy to 2, the paintbox just sent the F0 73 9D command again.
The ramcorder answered with F5 41 01 00 05 00 01 C3 which is different to before, frame 1

Its interesting how the 73 command with no parameters could make the ramcorders response change.

What happens if you just keep dong that repeatedly?
Also would be interesting to see what happens if you manually send F0 73 9D a few times, does it toggle, count up or what?

yes i noticed that before, i think i know what it is...

i mentioned previously how those counters are probably fields so 0x0 would be frame 0 field 1

i think these types of reply 'F5 41 01 00 05 00 01 C3' are more like a current status response from the ramcorder where it reports it's current frame...

i think what's happening is as the ramcorder is always outputting video depending on when it sends the status it could be outputting field 1 or field 2, which makes the reply change

i did try keep generating that response and it's pretty much 50/50 which response you get

[Willyarma]

I probably should have gone furthur through the video and log before commenting, the 73 command is highlighted quite nicely when you did a play in background and then change to frame 100.

Well thats one of the commands known!

[dexters_lab]

one of a few! it's odd though how there seems to be too much data in the commands for what they do... i wondered if it was based on some other protocol, like the one for the Abekas A60 as it seems over complicated. But then that was very Quantel.

The A60 was a similar kind of thing, but was open as in it was an off the shelf non-lossy instant access video device using a hard disk, but i can't find any details on the RS232 control protocol for it to see if it's similar

the forum member OzOnE has been pestering me to learn fpga design so i do wonder if he could help me learn some of it to make something that replaces the ramcorder. It could be an interesting project.

[Willyarma]

All I could find was a protocol for video disk control protocol, but its nothing like this, so not much use.
http://www.buftek.com/pdf/VDCP.pdf

FPGAs are very cool and awesome and are worth looking at, but they can be both easy and very difficult at the same time!
Check http://www.asic-world.com/verilog/index.html and http://www.fpga4fun.com/ to get started.

I've just ordered some bits to do SD & HD-SDI in & out on FPGA, also a 6809 and a SCN2681 mainly because I'm interested and want to do it for my own projects but also to tie in with this.
I'm going to copy this (with a few modifications) http://www.bradrodriguez.com/papers/6809cpu.htm (on breadboard to start with) and then see what happens when I run the ramcorder eprom on it!

It would be cool if someone knew of a SCN2681 compatible FPGA IP core (free), then the 6809 and UART could go on FPGA, and do the whole project on 1 chip! (except for RAM)

[OzOnE]

Hi, all,

I'm back from the weekend break now, and just catching up.
Brace yourselves, because this will contain a lot of links / rambling. hehe...


You are correct, @Willyarma - the DUART registers seem to be accessed indirectly in the code.

I know a fair bit of 6502 code, but not quite so familiar with the 6809, so it confused the hell out of me as well at first. lol

But, I'm still not quite sure where the serial routines are, because this part seems to be writing to 0x5002 instead of 0x5003?

Mr Dexter confirmed the other day that the address lines [3:0] on the CPU do connect directly to the SCN2681 / MC2681 chip directly, so the mapping is probably correct.

That is unless there's an endianess issue somewhere in IDA, and register 0x5003 IS actually the RX/TX Holding Reg for serial port "A"?


I made a bit of progress on Friday with getting the Ramcorder ROM running on the DE1 FPGA board too...

Not a huge amount added to it yet, but I think the serial stuff could be spoofed quite easily once the routines are figured out...
https://paste.ofcode.org/5WXFAHdfEmeZChhtWaK4CL


I managed to get the classic Paintbox (DPB) ROM sort of running under MESS many years ago, but I'm not so great with C/C++, so didn't get much further with it. lol



I did get it running on the DE1 as well though, and implemented many of the original boards from the DPB, but never quite got to the point of getting it to boot into the "painting" GUI.

For the serial port stuff on the "DE1 Paintbox", I simply spoofed the status reg for the UART using the flags from the serial TX / RX blocks, and it worked fine via the proper RS232 port on the DE1.
The same could be done for the Ramcorder code, but it looks like it makes good use of the IO ports, timers / counters, and interrupts instead, so may take a while to get running properly.


The Ramcorder version could be quite interesting, as we would also like to start doing some SDI stuff, so it would be great to collaborate on this.

I think the resulting device could make good use of a Rasp Pi for streaming the frames, but I'm not quite sure if it would be up to the task of delivering each frame in an instant (even with SD resolution)?

The Rasp Pi thing would work a bit like the aptly named "Dexter" device for replacing ageing Laserdisc players in arcade cabinets. The Dexter board is a "bargain" at only $399.
http://laserdisc-replacement.com/


I definitely want to make a small PCB with the SDI Tx / Rx chips on it now. I stumbled upon this the other day...
http://www.ti.com/product/CLC021

And a PCB project by Mr Citrus...

https://oshpark.com/shared_projects/YO08zbht


I did set up an FPGA project for the board that Mr Dexter has, which should output an SDI test pattern.

But, we weren't quite sure about the proper way of driving the cable, so haven't tested it out yet.

I think it might even work OK for shorter cable runs to just drive it via a resistor tbh, but yeah, it would be far easier to just use the proper SDI chips to handle that.


Anywho, yep. A ton of stuff to discuss, but some interesting project ideas.

I'll make a start now on my own PCB that uses those Ti SDI chips, but include both the Tx and Rx on the same board.


EDIT: I did a screen capture of the whole process of designing a PCB in Eagle for the SDI TX chip.

It's an "exciting" 49 minutes of me doing the usual pedantic game of trying to get the ground plane between as many traces as possible. lol

https://drive.google.com/open?id=1fMbVXHp9pNuMu07OivV6nsVXj_5cipY4

That CLC021 chip costs around £30 btw, so not at all cheap.

I'm thinking maybe we should just test the SDI output directly from the FPGA itself, as the entire dev board I sent to Mr Dexter barely cost much more than that.

I don't think the "direct" SDI output from the FPGA would manage higher than 480i/576i/480p/576p resolutions, but that's perfect for the Paintbox stuff.


OzOnE.

[Willyarma]

Awesome stuff! 
If your interested the ones i got were LMH0002 (SDI driver) £7.27 + VAT from farnell and LMH0034 (SDI equaliser) £15.54+VAT, (ones with legs! I can do QFN but hate it) also the SCN2681 and 68B09 have arrived, im trying to build a 6809 board this week just for kicks really, but will try the ramcorder eprom on it and see what I/O addresses it talks to if I can make it work.
Looking at the Xilinx XAPP on SDI, it looks possible to do up to 1080P on my Pipistrello board, It does the serialisation on the FPGA i think, I wont be working on this for a short while tho, too much to do!

[OzOnE]

Nice. Thanks for the tips on the SDI chips. We might look into that if the "direct" FPGA method fails.

I saw those chips on the TI site earlier, and it does seem to make more sense to leverage the FPGA for the serialiser / deserialiser stuff, and skip the cost of the CLC chips etc.

(I hate QFN as well btw, especially with the thermal pads underneath. lol)


I have most of the code in place for using the Altera SDI IP core for the SDI Tx / Rx, but I'm not confident about whether I've done the flag encoding properly yet.

What we're thinking of doing (maybe tomorrow) is just testing the SDI Rx block first, by inputting a signal via a small cap, then seeing if it gets a lock.

We can then see in SignalTap whether the output signals from the Rx block look OK, then can just route that directly to the TX block to test that.

I have a pattern gen hooked up to the SDI Tx block atm, but it doesn't yet have the timings for showing a 480i / 576i pattern, only 480p, 720p, 1080i, 1080p etc., so that won't yet work for inputting to the Paintbox just yet anyway.


Looking forward to seeing your progress with the 6809 board. Keep us updated with photos etc.

OzOnE.

[Willyarma]

I've had a look through the stuff u posted, very cool stuff!
Glad u use verilog not VHDL! hehe
I would like to see the results of the Altera SDI stuff your doing.

Xilinx SDI - https://www.xilinx.com/support/documentation/application_notes/xapp1076_S6GTP_TripleRateSDI.pdf

I tried using this emulator https://github.com/spc476/mc6809 i ported it over to Visual Studio which was a pain.
Its really easy to trap memory reads & writes with it and I altered it to print out what it was accessing and it looks like its accessing the timer registers of the DUART quite a lot, thats one of the reasons I wanted to use a real chip.
It also accesses 0x5100 and around 0x54xx too.

Please dont laugh at the attached photo! I thought i'd do it on stripboard cos it was quicker but it would have been quicker to make a PCB! I'm half way through it.

[OzOnE]

Yeah, I really don't get on with VHDL tbh.

I mean, I can read it and make sense of it, but I find it so hopelessly verbose for what it does, and harder to "scan".

I don't know of many things that are done in VHDL that can't be done in Verilog either, and especially not SystemVerilog.

A ton of retro cores like the Minimig (Amiga) are written in Verilog too, and that obviously works fine.

I even started translating some of the VHDL for things like the Genesis / MD core into Verilog. lol

(I managed to translate the TG68K core into Verilog, but there is still a bug somewhere which screws up certain instructions.)


The stripboard looks fine btw. Much neater than what I've produced in the past.


OzOnE.

[dexters_lab]

no laughs from me, i am just genuinely  impressed at your enthusiasm 

i don't think i mentioned it before but there is a AM2952 on the CPU card, that could be where the other access are to

[Willyarma]

Just looking at the AM2952 data sheet  Thats a very special looking thing!

[james_s]

Yeah, I really don't get on with VHDL tbh.

I mean, I can read it and make sense of it, but I find it so hopelessly verbose for what it does, and harder to "scan".

I don't know of many things that are done in VHDL that can't be done in Verilog either, and especially not SystemVerilog.

A ton of retro cores like the Minimig (Amiga) are written in Verilog too, and that obviously works fine.

I even started translating some of the VHDL for things like the Genesis / MD core into Verilog. lol

(I managed to translate the TG68K core into Verilog, but there is still a bug somewhere which screws up certain instructions.)


The stripboard looks fine btw. Much neater than what I've produced in the past.


OzOnE.

Anything that can be done in VHDL can be done in Verilog and vice versa, it's a matter of preference.

Personally I find Verilog looks like abbreviated gibberish while VHDL is very clear and easy to follow. A lot of it probably comes down to which language one is more familiar with but I find the strongly typed and verbose nature of VHDL to be helpful, it's almost self commenting.

[PA0PBZ]

Just looking at the AM2952 data sheet  Thats a very special looking thing!

Watch out that you are really looking at the right datasheet, it fooled me too the first time...

[Willyarma]

Watch out that you are really looking at the right datasheet, it fooled me too the first time...

DOH! yeah your right! I got a high-performance 8-bit slice microprogam sequencer! Am I right in saying its supposed to be a Eight-Bit Bidirectional I/O Ports with Handshake?

[Willyarma]

But, I'm still not quite sure where the serial routines are, because this part seems to be writing to 0x5002 instead of 0x5003?

Isn't that the bit that configures and sets up the DUART?
Have a look at this listing: http://www.bradrodriguez.com/papers/6809lst1.txt it made it a bit clearer for me on how to set it up.

[PA0PBZ]

Watch out that you are really looking at the right datasheet, it fooled me too the first time...

DOH! yeah your right! I got a high-performance 8-bit slice microprogam sequencer! Am I right in saying its supposed to be a Eight-Bit Bidirectional I/O Ports with Handshake?

Yup, that is the correct part

[dexters_lab]

Watch out that you are really looking at the right datasheet, it fooled me too the first time...

DOH! yeah your right! I got a high-performance 8-bit slice microprogam sequencer! Am I right in saying its supposed to be a Eight-Bit Bidirectional I/O Ports with Handshake?

that'll be a AM2910? coincidentally Quantel use one of those on the disk sequencer card for the DPB-7000 classic paintbox

but yes, the 2952 is a bi-direction io port

interestingly there is mention of a bidi bus in the diagnostics menu that PA0PBZ posted up

Code: [Select]

ROM:A1A0 0000001A C CAROUSEL Diagnostics Menu                                                     
ROM:A1BA 00000027 C Uxx        Bidi Bus Read Of Address xx                                         
ROM:A1E1 00000028 C /yy        Bidi Bus Write yy To Last xx   

[dexters_lab]

It's been a while since i posted here but i finally got around to fixing this machine.

https://youtu.be/1617W06XVRA

[dexters_lab]

Here's some details on the completed 2nd revision of the board that replaces the STV1601 SDI Serialiser in the Quantel Ramcorder.

The board is designed to plug in place of the STV1601, it contains only the TI/National CLC020ACQ SDI Serialiser and some passives. There is a 1.69k resistor that sets the SDI output levels, a decoupling cap (an old tantalum i robbed from something else!!), a pair of 75ohm resistor and 1nf cap on the two SDI outputs and finally a signal lock led and it's resistor. I also switched to 0805 size parts as i really struggled with 0403 without a microscope.

The reason we picked the CLC020 is really it was one of the cheapest options, i although the CLC020 is discontinued i found a seller in China with stocks of over 150k units and was selling them for about $6 each. Many of the other options available were either more expensive, not 5v tolerant or only available in BGA.

For the Quantel Ramcorder the output was originally passed through to a STV1389 SDI line driver and some additional passives contained on the SDI 'module' board but as the CLC020 contains a built in line driver this wasn't needed so i just added in what quantel did for the connection to the external ports using a two pin header. This means the SDI is not connected to the host system as it's tapped off directly from the CLC020.

The SDI output from the CLC020 is not signal compatible with the STV1601 due to the built-in line driver so if the SX & SY output from the STV1601 does need to pass through to the host system some modification will be needed to remove the old ST1389 line driver and any related circuit. Essentially the STV1389 needs to be bypassed. This would be the case for the Quantel Paintbox where the SDI output eventually drops down to the host and ends up on a coax socket on the Video Output card.

[SL4P]

OK, THAT’S ENOUGH !  I’m not VINTAGE - yet.
I was halfway through my TV career when the RAMcorder appeared.  We had a bunch of Quantel gear of all sorts.

Even more interestingly, I was the post guy that worked closest with our Scanimate specialist in Australia, and that was a nasty piece of analog !   What’s the chance of that ?

It was very thermally unstable, such that it needed ‘fine tuning’ every couple of hours at least.
But it certainly could generate images that were otherwise unavailable...
An interesting part of the Scanimate operation was the need to capture the CRT output on FILM(!) because the CRT traces were transient, and we needed the film to create continuous motion effects.
(Hi to Russ and the other remnants of VTC / Image East !)

[mikeselectricstuff]

OK, THAT’S ENOUGH !  I’m not VINTAGE - yet.
I was halfway through my TV career when the RAMcorder appeared.  We had a bunch of Quantel gear of all sorts.

Even more interestingly, I was the post guy that worked closest with our Scanimate specialist in Australia, and that was a nasty piece of analog !   What’s the chance of that ?

It was very thermally unstable, such that it needed ‘fine tuning’ every couple of hours at least.
But it certainly could generate images that were otherwise unavailable...
An interesting part of the Scanimate operation was the need to capture the CRT output on FILM(!) because the CRT traces were transient, and we needed the film to create continuous motion effects.
(Hi to Russ and the other remnants of VTC / Image East !)

There are some intersting videos on Scanimate - this was a very clever idea that created geometrical effects by passing the scan waveforms for the CRT through an analogue computer.

[dexters_lab]

sorry for pinging an old thread but thanks to the kindness of Willyarma providing the original code for their QCapture app, we have been making some improvements to the decoding of the ramcorder protocol.

We also have some very good thoughts on creating a Ramcorder emulator on a PC!

[SL4P]

In high-end video post, I was lucky enough to work with most of the gear discussed above - even Scanimate ! .
But I do remember when the RAMCORDER was announced, and apart from the cost, we were all drooling at the idea.
No problem, we had a lot of other cool toys l and that (RAMCORDER) became irrelevant within a couple of years.

Quantel did some really interesting stuff in the early days of digital video… the other standout was Abekas with their first-of-type equipment.

[dexters_lab]

In high-end video post, I was lucky enough to work with most of the gear discussed above - even Scanimate ! .
But I do remember when the RAMCORDER was announced, and apart from the cost, we were all drooling at the idea.
No problem, we had a lot of other cool toys l and that (RAMCORDER) became irrelevant within a couple of years.

Quantel did some really interesting stuff in the early days of digital video… the other standout was Abekas with their first-of-type equipment.

Hey that's cool, there's some speculation in our community that the ramcorder was destined for bigger things, like as a stand-alone product that could replace a VTR or something like an Abekas A60