Author Topic: Altium voltage clearance  (Read 3773 times)

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Offline AuwdioslaveTopic starter

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Altium voltage clearance
« on: July 30, 2015, 02:30:10 pm »
Hello all,

I have question regarding voltage clearance classes in Altium.
I'm an SMPS designer. At my previous employer, we used Cadstar for all PCB designs. In cadstar I could easily add voltage spacing classes to different nets. These classes could then be placed in a spacing matrix, specifying the spacings between the different voltages present on the PCB, like the example seen below:


The example has 2 spacing classes, 110V and 220V.
Spacing between these classes is defined as 2mm. Spacing between 110V nets is defined as 1.2mm, spacing between 220V nets is defined as 2.5m.
Spacing between 400V and all other nets (Unclassed) is defined as 4mm, spacing between 200V and Unclassed is defined as 2mm.

Is there an easy way to make a similar matrix in Altium?
So far I've only found a way to create rules for each individual spacing rule between individual spacing classes. On an SMPS design with multiple converters running on different switching frequencies, you can quickly get a lot of different voltage classes in your design, so it would be very time consuming to create unique rules between each of them.

Thanks in advance  :)
 

Online T3sl4co1l

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Re: Altium voltage clearance
« Reply #1 on: July 30, 2015, 02:42:55 pm »
I'd say you can do exactly the same, it just has to be written out.  So it won't be as compact as a matrix.

Go to Design - Rules (D, R), Electrical, Clearance, and add rules for pairs of classes.  In this case, you'll have "where the first object is" one net class (the row in the matrix), and second from the intersecting matrix column.  You can save some rules by using just one query against "all".

You can also add exceptions, like, IsPad finds all pads, and they can be assigned a lower clearance, which is sometimes necessary to get common footprints to behave (like the close spacing on a TO-220 -- you might have to route out slots between pads to meet UL, but Altium won't know about that gap as far as clearance).

Specify nets on the schematic using Net Class directives.  (If these are ugly or obtrusive on the circuit, you can always encircle a pile of Net Labels with a blanket directive.  Assuming you're naming the nets, which I would recommend.)

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
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