Bad connection between track and pad

[rozeh]

Hi guys
I have problem to draw some tracks. look at this image:



For example in this image, one of the pads is connected very well but there are three pads with poor connections as you can see. What's the problem? how to figure out this problem?

[free_electron]

You have clearance rule violations. Solve those and the problem will go away. Altium stops at that edge because the design rule checker says : can't go there, it's too narrow.

[rozeh]

How to solve it?
Why the pads of the MCU are loaded with plus sign?

[rozeh]

This is the result of design check rules:

[T3sl4co1l]

http://techdocs.altium.com/display/ADOH/Design+Rules

Attached: open the ZIP, place the .rul file in your project folder, and follow the instructions above to import design rules.  The built-in defaults are a bit too basic.  This should be a better start.

Tim

[rozeh]

Thanks
Before applying the rules:



After:



And its rule check:

[free_electron]

How to solve it?
Why the pads of the MCU are loaded with plus sign?

Because those are violations against The design rules. you are most likely violating clearance rules

[free_electron]

type <D><R> ( Design - Rules )
A window will open.

Look in the list for clearance rules and set those correctly per layer
Look in the list for width rules and set those properly

[T3sl4co1l]

You didn't import the rules correctly.  I have 24 items on the report, from the project I exported the rules from ( http://seventransistorlabs.com/Images/AltiumRuleCheckReport.png ).

Also, check that the rules are ticked for batch processing (T, D): http://seventransistorlabs.com/Images/AltiumRuleCheck.jpg

Tim

[ConKbot]

For a design rule to help you find those, rather then having to just look closely,
http://www.newelectronics.co.uk/electronics-videos/altium-design-secret-23-advanced-setting-of-the-width-rule/62909/   


AV sync is a bit weird in the video, but you dont see a person talking, so its not that bad.