Altium15 rule for clearance violation to keepout tracks for castellated slot

[Psi]

I've been trying to find the right syntax to add a clearance rule to allow my free pads (which are castellated slots ) to skip DRC violation since they are supposed to extend out of the PCB.
But no matter what I try Altium always seems to ignore the rule.

Any ideas?

[Psi]

I have tried a clearance rule (either electrical or placement clearance) with lots of stuff, even generic stuff that should work. But no luck

IsFree = true   

HasPad('Free-BattPad+') = true

IsPad

InPadClass('Batt')     // I put it into the batt pad class)

[thm_w]

You set the priority to highest right?

https://www.altium.com/documentation/altium-designer/selectively-waiving-drc-violations-ad?version=17.1
https://www.altium.com/documentation/altium-designer/defining-scoping-managing-pcb-design-rules

[Psi]

yep, it's the first/top rule, default rule is below it.

[T3sl4co1l]

I believe the Keep-Out Layer is absolute; you can set distance to it, all the way down to zero, but any overlap is absolutely prohibited.

This appears to be one downside of using KO for board outlines/cutouts.  Consider moving these graphics to a mechanical layer, or drill drawing?

As of AD 16.1 at least, the Board Outline Clearance rule class (I forget if it was in AD15 as well?) seems to work, but it's... kinda weird?  It doesn't show violations (maybe because the board outline isn't a real object and it needs two objects to point at and say "aha"?), and it works during interactive routing (but the collision outline isn't shown with CTRL+W*) but not when dragging traces for example.

*Which I think was added AD16 so don't mind that.

Oh, in AD18 or so (or maybe it was 20, I forget?), they revamped the keepout system, I wonder if that affects this particular situation.  Didn't think to try it...

Tim

[Psi]

Thanks. I think that explains it.

Will just use a different layer for my pcb outline/route layer.