Clearance rule from via-hole-edge not copper-edge

[VanBudd]

Hi,
I need to define a clearance rule that starts from the vias hole edge and not the copper (Annular ring) edge.
For comparison, heres the clearance setup from altium (from copper edge):



And heres the one that i need (from hole edge):



Reason is, on the inner layers i removed the non-functional-pads (so no annular ring).

Now if i set a normal clearance rule for vias i can only define one clearance for all layers (because vias are in Multi-Layer).
If i set the clearance for the viahole to copper (from pcb manufacturer) on the inner-Layer if theres no annular-ring its fine, but if theres an annular-ring its way to big because the rule starts at the copper edge.

Here an example, the rule from the manufacturer says that the clearance from the hole-edge to copper has to be at least 150um.
In the picture you can see that GND via with no annular Ring is fine, but the CS Via with ring isnt because the rule starts at the rings edge.



I couldnt find any query command that would fit my problem.
I hope someone can help me.

[VanBudd]

A query command like   isvia and (annularringsize < 0.1)  would be perfect, but couldnt find anything like that.

Does someone know how the annularring is defined in altium?
Is it a pad?

[ajb]

Is the 0.15mm hole-edge-to-copper clearance larger than your electrical copper-to-copper clearance, and do you really need to take advantage of that on this board?  If not, then none of this matters and you can just use the electrical clearance rule to set spacing from via barrel as well. 

Now if i set a normal clearance rule for vias i can only define one clearance for all layers (because vias are in Multi-Layer).

You can define different clearance rules per layer -- under "Where The First Object Matches" you can select "Layer" and then select the layer you want, or you can create a query to select multiple layers at once.  You can also use "Where The Second Object Matches" to filter for the vias you care about. 

Does someone know how the annularring is defined in altium?

AFAIK , "Annular ring" isn't really a concept that Altium has, outside of a few specific user dialogs -- internally and in the filter/rules engine I think it only deals with pad diameter and hole diameter.  You might be able to do the math to determine annular ring in a query, though.  Something like the below seems to work:

Code: [Select]

IsVia AND (((PadXSize_MidLayer1 - HoleDiameter)/2) < 0.001)
Note: using `< 0.001` here instead of `== 0` to avoid Altium rounding errors.  There might be a better parameter to use for the pad size.  Or if you're using via templates (hopefully you are if you're doing an 8-layer board with varied ring size per layer?) You can probably filter on the via type instead.