Cascading same sheet symbols

[ptoth]

Hello,

I am wondering if it is possible to cascade the same sheet symbol multiple times as shown in the attached picture?
The problem is that upon document compilation I always receive multiple netnames on Out and In.

The Net Identifier Scope is on Hierarchical and Netlist Options only on Higher Level Names Take Priority.

The error message is the following
"Warning Wire LDL1_!OUT has multiple names (Net Label LDL1_!OUT, Net Label LDL2_In)"
This confuses me even more, since the netlist option "allow sheet entries to name nets" is not even turned on, so in that case, there shouldn't be even a net named "LDL1_!OUT".

I also tried to add an explicit netlabel to it but the upper list of naming conflicts gets only extended.


Best regards
ptoth

 

[Pseudobyte]

The error message is the following
"Warning Wire LDL1_!OUT has multiple names (Net Label LDL1_!OUT, Net Label LDL2_In)"

The thing is, it is a warning not an error. This will show up any time you have what altium would consider one physical net composed of multiple logical nets.

You can tell Altium how to assign net names. By default sheet entries are allowed to name nets, this is the source of your warning.

Uncheck this box to stop altium from trying to name physical nets from logical sheet entries. Those warning should go away then, as long as there is only one net label.

Project Options >> Options tab



With none of these boxes checked only power ports and net labels (and maybe off sheet connectors, im not sure) will name nets.

[Pseudobyte]

Another thing is. I usually make it a point to leave that check on. It gives me peace of mind to know that my blocks are properly connected. I step through those warnings and think to myself"does it make sense that all these nets are connected". I think it is a good check.