I took a look at the project, and a few things:
When I first open your project, I see that P2 is connected to J2, but J3 and P1-P4 do not show any signal connections (only power).
When I try to update the PCB from schematic, I get "Cannot match pads with new footprint in component" for J1-3, because the PCB has different versions of those connectors than referenced in the project. Are you seeing those errors as well? This seems to cause the "Add Net" operations to fail. If I just delete those connectors from Sch, then P1 and P3 get the proper connectivity to P4 (P2 does not) with no other changes.
The reason P2 doesn't get its connectivity is that in Connector_AFE2 you have the I2S harness break out into nets that you have manually labeled "AFE[1_MCLK" etc. This is a problem because of the way that AD resolves net names when it compiles the project. Altium will automatically name the nets that go into harnesses HarnessName_HarnessSignalName, so if you were to delete those net labels in Connector_AFE1 and Connector_AFE2 and just use wires for connecting within the sheet, you would get one net named "AFE1_MCLK" and another net named "AFE2_MCLK" automatically, because the harnesses will take their names from the sheet entries in the top level sheet. But your net labels directly collide with these names, and this clearly prevents Altium from resolving the netlist correctly for some reason. This is a little strange because you can name those nets basically anything else--you can even name all of those nets "MCLK", "BCLK" etc on each sheet--as long as it doesn't match one of the names that Altium autogenerates and everything will resolve correctly. I suspect that at some point in the net resolution process Altium does a check to see if a net already has a prefix that matches a harness and then skips the prefixing. If you were to name the AFE2 MCLK signal "FOO" via a net label it will end up getting resolved to "AFE2_MCLK", but if you name it "AFE1_FOO" it will remain "AFE1_FOO". I guess this behavior sort of makes sense in most cases, especially in designs with more hierarchical layers where you don't want a net name to end up as a long string of prefixes, you just happened to create a situation where that makes it blow up.
What makes this even weirder is that once you get the correct connectivity by changing the net names to something else, you can change them back and altium will simply rename the net and otherwise compile the project and update the PCB with no complaint, although this leaves you with duplicate net names. It's apparently only when initially building the net list that it needs these precautions.
So the solution is to fix those net labels. Either use wires instead of labels (remember you can use harnesses within a sheet, which may work nicely here for you given the way the signals land on the connectors), or use net names that do not start with the name of one of your harnesses. If you really only need one I2S instance in each of the sheets then you can just name them "MCLK" or whatever, but I notice that you have all three of the AFE1 and AFE2 and WI harness signals on each of the three card connectors, which will mean you need to differentiate them some way, but NOT by using the harness names directly as prefixes.