Electronics > Altium Designer

hierarchical port being automatically resized?

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incf:
Does anyone know how to prevent hierarchical ports from being automatically resized? It can cause connectivity issues if the wrong end of the port gets moved as often happens.

In the attached example, A hierarchical block called "MEAS_BAT1" contains a hierarchical block called "COMP" and this has a port/named net called "BALBLE"
The port inside COMP gets resized to be as wide a the string "BALBLE_MEAS_BAT1" when performing various actions like clicking the tabs at the bottom of the schematic editor screen

Place the port in the editor tab, it's the size I'd like it to be

Click the tab for instance COMP1 (located inside MEAS_BAT1)

Go back to the editor tab and it is resized

Pseudobyte:
Make sure you uncheck ports. I would recommend Net Labels too.

incf:

--- Quote from: Pseudobyte on February 07, 2025, 12:05:54 am ---Make sure you uncheck ports. I would recommend Net Labels too.

--- End quote ---

Thank you.

I didn't even know those options existed - will try. (Although, I do wonder if it will have any other side effects besides just displaying different text)

sidenote: I reported the bug a while a ago through the 'proper channels' and surprisingly got a response from what appear to be dev/quality people.

Pseudobyte:
It is purely a visual thing for the editor. From what I remember, you have another similar set of options for the outjob for the schematic prints. I would agree that the behavior still seems like a bug. I think i'd prefer to leave those options on, but have the compiled net name in parenthesis beneath the port.

If you are trying to change the multichannel/hierarchical naming you need to do that in the project options.

incf:

--- Quote from: Pseudobyte on February 11, 2025, 11:01:07 pm ---It is purely a visual thing for the editor.

--- End quote ---

The bug moves and disconnects ports in some instances, and messed up my board - which is how I got the dev teams attention

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