Hi everyone,
I need a help with Altium Designer. I have a bus LED_DRIVE[20..1], and I would like to split this bus into 4 buses, named as
LED_DRIVE_I[5..1]
LED_DRIVE_II[5..1]
LED_DRIVE_III[5..1]
LED_DRIVE_IV[5..1]
such that
LED_DRIVE1, LED_DRIVE5, LED_DRIVE9, LED_DRIVE13, LED_DRIVE17 => LED_DRIVE_I[5..1]
Here is a screenshot of how I did that. Is there a better way?
The problem is that a single wire cannot have two net names, and net names are used to index bus signals. That is why I used a signal harness, but it does not seem right. I still get a bunch of warnings "Net has multiple names"
There are a number of situations where Altium's buses and harnesses don't quite work the way you'd want. In your case, there may be a better way, but it depends on what you're trying to do. If you're dealing with repeated sheet symbols on both ends, then you're kind of stuck with something like what you have, unless you place individual sheet symbols without using the Repeat option. You might be able to do slightly better by placing multiple sheet symbols inside of their own sheet and then rearranging the bus inside that sheet. Another option might be to use harnesses instead, and place the four smaller buses as harnesses inside of the main large harness, but this won't work with repeated sheets.
Or you may be able to use the bus as a purely graphical element--name the constituent nets however you want, run the wires to a bus wire as you normally would, but do NOT name the bus. In this case you're actually relying on the net labels themselves to establish connectivity, and the bus wire is only a visual guide to show the reader where all of those signals go.
The "Net has multiple names" warning is just that--a warning. There are many situations where you may have more than one name attached to a net, so it's useful for sanity checking, but does not necessarily indicate a problem.
Indeed, you can't have two names for a net, they must be unique. There are no aliases. The warning is to say that you may not get what you expected, and it may be unexpectedly inconsistent as edits are made, or project settings changed.
What you can do, is add a net bridge between nets. This is a physical component, made of connected copper (for example, a footprint with two pads and a trace shorting them together). Now you get ~zero ohms between the nets (and for simulation, use a resistor with say 1u ohm value). You do need to place this component somewhere, but it can be as unassuming as any regular trace. This does add more tedium to the PCB, since the net bridges must be placed.
Tim
Hey guys,
Thank you for your valuable suggestions. I decided not to bother with net ties at this moment, and not to use REPEAT on problematic schematics. In that case I do not need to "reorganize" buses and everything is fine