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Author Topic: I am getting errors with polygons on internal layers on Altium  (Read 719 times)

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Offline VlachooTopic starter

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I am getting errors with polygons on internal layers on Altium
« on: June 29, 2023, 03:35:03 pm »
Hello, I need help, I am getting errors like the image between polygon (+5 or GND) on my 6 layers PCB and I need to solve this.

Help please.
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Offline ajb

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Re: I am getting errors with polygons on internal layers on Altium
« Reply #1 on: June 29, 2023, 07:42:04 pm »
What does the actual violation look like?  Did you repour the polygons after adding the vias involved in the violation?  Are you using plane layers, or signal layers with polygons?  What are your clearance rules?
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The following users thanked this post: thm_w, Pseudobyte

Offline Pseudobyte

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Re: I am getting errors with polygons on internal layers on Altium
« Reply #2 on: June 29, 2023, 08:03:56 pm »
This might be a dumb question but have you re-poured your polygons? Shortcut T G A
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Offline mengfei

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Re: I am getting errors with polygons on internal layers on Altium
« Reply #3 on: June 30, 2023, 03:36:05 am »
what are your rule setting? & just like what Pseudobyte said, try to do a whole repour again
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