Polygon clearance from board edge / cutout

[toohec]

Hey everyone... I'm new here and just looking for some hints on a time saver.  I'm able to accomplish everything I need, but I'd like to eliminate a few steps and save a little time.  This is something I think Altium should be able to do automatically, but instead it requires extra manual work... at least as far as I know.  Hopefully someone will surprise me. 

Anyway... does anyone know if there is a method to create a clearance rule for polygon pours that results in an automatic clearance from the board edge or any internal board cutout regions?

For instance with board cutouts, I have tried creating a clearance rule like that uses 'InPolygon' and 'IsBoardCutoutRegion', but that will still pour the polygon right up to the cutout region; which will result in a DRC clearance error.  So I typically add a polygon cutout with my desired offset (or possibly a keepout in some cases) around the board cutout.  This works fine, but if you decide to change the offset later, it requires you to redraw/edit the cutout/keepout, as opposed to changing a single clearance number in the rules.  I'm not sure why the 'IsBoardCutoutRegion' query will not work for polygon clearances.

Same thing with the board outline... I typically just draw my polygon with the desired offset off the board edge or add a keepout, but it would be nice if there was a rule that took care of this.  Again, I tried to use 'IsBoardOutline' in my rules, but that doesn't work.  So is there anyway to use the "IsBoardOutline" query for this at all, or I am stuck using my current methods?

FYI.. I'm using Summer '09 release (9.3).  Maybe this is addressed in newer releases??

Anyway, any help or advice is appreciated.  Thanks.

[electroguy]

try a clearance rule between  'InPolygon' and 'mechanical layer x objects' and then define your board cutout on the mechanical layer.
otherwise, if you use keep out layer for your cutout, try it with  'InPolygon' and objects on 'keepout layer'

[free_electron]

Should work fine. Did you set the rule priority right ? You need to make sure that these rules have a higher priority than the default ! Otherwise no-go ...

[toohec]

electroguy: Thanks for the recommendation.  That sounds like a good solution since I already have a mech 1 layer with all the board contraits.  I'll give it a shot.  Thanks.

free_electron:  Yeah, I agree it SHOULD work, but it doesn't.  I have verified all my priorities, but they don't have any effect.  Even a single clearance rule using 'All' as the constraints does not result in a clearance from a board cutout, or a board edge.

[toohec]

Electroguy... I'm currently experimenting with it, but I've been unsuccessful so far using a mechanical layer as a constraint.  I believe the problem exists because in the section of the clearance rules with the clearance diagram (showing the track and circle/via where you define the clearance distance), the only net options are 'Different Nets Only', 'Same Net Only', or 'Any Net'.  This poses a problem since a mechanical layer object can't have an associated net.  And 'No Net' is completely different from any net, so therefore none of the drop down menu selections are applicable choices for a 'No Net' object; resulting in no effect.

Using the keep-out layer to define the board edge works in a way, but since I typically have RF tracks that extend directly to the board edge for launches, I have to clear the keep-out in that area.  I tried adding something like a 'NOT(OnLayer('Keep-Out Layer'))' to those RF object constraints to tell it to ignore the keep-out layer, but that doesn't work.  Maybe you can't set rules to ignore keep-out violations on objects with net associations.

Anyway, thanks for the suggestions.  The keep-out layer method works to some degree, but I'll keep experimenting to see if I can find anything else. Thanks again.

[electroguy]

Electroguy... I'm currently experimenting with it, but I've been unsuccessful so far using a mechanical layer as a constraint.  I believe the problem exists because in the section of the clearance rules with the clearance diagram (showing the track and circle/via where you define the clearance distance), the only net options are 'Different Nets Only', 'Same Net Only', or 'Any Net'.  This poses a problem since a mechanical layer object can't have an associated net.  And 'No Net' is completely different from any net, so therefore none of the drop down menu selections are applicable choices for a 'No Net' object; resulting in no effect.

good point, it won't work using mechanical layer... never tried it before... sorry.

[Rufus]

does anyone know if there is a method to create a clearance rule for polygon pours that results in an automatic clearance from the board edge or any internal board cutout regions?

You can create such rules which will generate DRC errors, but, polygon pouring does not (and probably should) obey them.

I suggest you create a clearance rule between

OnLayer('Keep-Out Layer')

and

inPolygon

select any net but I'm not sure it matters.

Then you need keep outs for the board outline and cut outs. You can do that manually or duplicate the cut out regions and set them as keep outs on the keep out layer.

Alternatively 'Design | Board Shape | Create Primitives From Board Shape'  can outline the board shape and cut outs to the keep out layer automatically.

Edit: Oops just noticed you said summer 09, not sure if summer 09 has all the above features.

[MrZANE]

Hi.

Anyone found a good solution to this problem?

Kid regards
/Jimmy

[skelly444]

This is a design flaw in Altium.  The only way to get around it is to
1.  Create a primitive from the board outline.  I make it 1mil wide and place it on the Keepout layer.
2.  Create a clearance rule:
a.  InNamedPolygon('Bottom-GND')OR InNamedPolygon('Top-GND')
b.  (OnLayer('Keep-Out Layer'))
c.  Set the clearance you want.

Repour and problem solved.

For those people that need parts or tracks to go to the board edge, you're harassed with continous errors.

There is no way to tell Altium to ignore errors!!!

[free_electron]

There is no way to tell Altium to ignore errors!!!

of course not ! that would be defeating the design rule checker.... that would be like telling the bungee guy to unclip the elastic just before you are going to jump ...
it is not a flaw. it is intentional !
and as for why you need parts or tracks go to board edge .. that is unclear to me as well... board makers hate that ! and there is no reason to do that ( and don;t give me lip about making castellation as you are doing it wrong if you are attempting to draw the castellations to the edge . )

[David_AVD]

I suggest you create a clearance rule between

OnLayer('Keep-Out Layer')

and

inPolygon

Just tried this.  Much easier than remembering to draw the polygon a little smaller than the board outline.

I keep learning more and better ways to do my layouts in Altium.   

[toohec]

Just tried this.  Much easier than remembering to draw the polygon a little smaller than the board outline.

I keep learning more and better ways to do my layouts in Altium.   

You shouldn't even need this rule; it occurs automatically.  Simply by having lines/fills/etc on the keepout layer, the polygon pours will automatically conform to your applicable clearance rule.   The reason this didn't work for me originally is because I had certain RF net-classes that I wanted to allow to reach the edge of the PCB (thus intersecting the items on the keepout layer and generating a DRC error.)  I could edit the keepout layer to remove the keepout info at the intersect, but editing the polygon shape and using polygon keepout was more precise overall.  And plus... you cannot create an exception rule for the keepout layer.

We just recently upgraded to the latest Altium release (from Summer '09), so I'll have to experiment to determine if they made any improvements in this area.  I hope so since I think it's something Altium should have.

[David_AVD]

I wanted to set a different clearance from the board edge to poly than pads to poly.

[toohec]

I wanted to set a different clearance from the board edge to poly than pads to poly.

Dang it... I just typed up a huge detailed response and my login timed out so I lost my post.  So here is a very brief response for now.

Having different clearance rules for various items/classes is understandable.  What I meant to imply was that the OnLayer('Keep-Out Layer') text doesn't actually do anything in a clearance rule.  (Again I'm basing this off of Summer '09, so it may be different in the latest version.  I'll have to experiment with it in Altium '13 later this week.  What version are you using?)  Anyway, I'm going to guess that if you deleted the OnLayer('Keep-Out Layer') text from your poly-to-boardedge rule (but don't delete the rule itself), you'll end up with the same result.  I don't know how your clearance rules are setup, but it's possible that your poly-to-boardedge rule is functioning as your "global" clearance rule that covers all items not covered by your other clearance rules.  In other words, you are getting the result you want, but it's not because of the OnLayer('Keep-Out Layer') criteria in the rule.  I might be wrong; please let me know if so.

Not trying to be rude... just trying to help you get a better understanding of how clearance rules work, and their limitations.  I typically find a lot of people have excessive text in their clearance rules that don't have any function/boolean match.  When I experiment later this week, I really hope to find that Altium '13 added the ability to create clearance rules against mechanical layers.  That would be perfect!

[David_AVD]

Taking the OnLayer('Keep-Out Layer') out of the rule means that it will get applied to anywhere the polygon meets any other object.  That's not what I want.

The board outline is on the keep-out layer and the rule is working as intended.  If I remove the OnLayer('Keep-Out Layer') part it applies it (as expected) to the pads as well.

[ivc]

Just to add another potential way of doing this; adjust the width of the keep-out tracks and re-pour the polygon.

For instance, to get a 30mils clearance all around the board edge (and any other cutouts), add OnLayer('Keep-Out Layer') to the toolbar filter, select all ctrl+a, in the PCB Inpector change the width to 60mils for all tracks and re-pour!

[odingalt]

Just to add another potential way of doing this; adjust the width of the keep-out tracks and re-pour the polygon.

For instance, to get a 30mils clearance all around the board edge (and any other cutouts), add OnLayer('Keep-Out Layer') to the toolbar filter, select all ctrl+a, in the PCB Inpector change the width to 60mils for all tracks and re-pour!

IVC, your solution was best for me, and is consistent with the Altium tutorial I found here:

http://techdocs.altium.com/display/ADRR/PCB_Obj-Region((Region))_AD

Worked quickly without having to know object names or write boolean expressions.

[David_AVD]

Just to add another potential way of doing this; adjust the width of the keep-out tracks and re-pour the polygon.

Then you adjust the polygon for a small routing change, it re-pours and you forget about the keepout width so you lose the clearance again.   

Better to learn how to do it properly.  I have a PCB template with all of my usual rules in it.  Set your prefs to use that file when you add a new PCB to a project. Simple.