Trace refusing to route all the way to pad

[mrflibble]

I'm trying to route a 100mil trace to the center of a TO220 pad and for some curious reason altium refuses. I think it's the online DRC kicking in, but I fail to see why. See attached. On the left we have the offending route. On the right we have a similar TO220 part with a similar 100mil trace and that routes just fine.

Oh yeah, when I route the offending trace, it does grid snap to the proper (desired) location. I can even see the trace outline at the desired location. But then when I do a left mouse button click to confirm the route ... it plonks it at this location. It really does look like DRC and I really don't see why. This is the only pad that has this "feature".

I even unrouted some of the surrounding traces just to make sure they were not causing the problem. Any ideas what's going on here?

[mrflibble]

Followup...

As a workaround I can do: remove part, route trace to desired location, update from schematic, place part. Then run batch DRC to verify ... and everything is dandy. Weeeeird. O_o

Anyways, if anyone has an idea what's going on that would be appreciated. I still would like to know what the hell is going on around here so I can avoid that in the future. Made an svn rev of it so I can go back to the curious pre-workaround state.

[SmilingTexan]

I think that may be a soldermask clearance issue - or "feature opening" I believe.

[AlfBaz]

Have you tried routing with a smaller trace, seems like that large one you are using might violate a clearance rule. It may also be that the footprint itself already vioaltes a clearance rule, with the pads being to close together. Browse clearance drc violations each one you click should highlight the problem area

[enz]

The track is wider than the pad diameter.
So the distance between the track and the adjacent pad is getting very short.
I think it is the normal clearance rule (Design | Rules | Electrical | Clearance) that is causing this behavior.

As AlfBaz already said, try a smaller trace, or change the design rule.

Martin

[mrflibble]

I think what happened was that the grid snapping was sneakily getting in the way. Short version: after making sure all the big component pads (those TO220's) were on a 25mil grid, then I had no trouble routing the 100mil trace all the way up to the pad.

It so happens that the TO220 on the right in the pic was "properly" on grid, while the left one was a tiny bit off. By which I mean that they were actually both OFF GRID XD, but one just happened to luck out location wise and the other didn't.

Anyways, 100 mil traces worked out fine with all DRC rules passed (10 mil clearance) and gerbers out the door to itead.

Onwards to the next pcb...

[HackedFridgeMagnet]

I've had that grid, snapto problem in Kicad too, took me a while to figure it out.