Hi,
The situation is i have a board with high voltage side and low voltage side, and have to keep 8mm between both side, i put all nets on the HV side in a class (with netclass directive) and they have their proper clearance rule as well 0.8mm .
i have a connector with main voltage in it, but have an unused pin, the online DRC show that track on the other pins need to be far 8mm from it

this is quite normal since their is no net in it , so basically it's not within that HV class.
am trying to configure the rule so that unused pad don't generate a clearance error and follow the same clearance applied to the HV nets.
Thanks
