design library doesn't have a square root compatible with your process
You can synthesize logic in ANY process. Even in an analog process. All you need is 3 primitives. NOT , AND OR. Everything else can be constructed from those when it comes to digital. A single transistor forms a not gate , and gates can be made in wired-logic with diodes if needed. Square root is an algorithm a trained monkey can execute. I don't know how it works. I never had the need , nor the desire to find out. If the need ever arises i will look up 'square root algorithm' , read it and code it up. Knowing how to do it is irrelevant. it's a party trick. nothing else. useless knowledge. Besides, if i ever catch an engineer coding up a square root algortihm i'll fire him. That is a trivial job that can easily be done by a tech...
what happens when your copied square root design doesn't work
Then you were too stupid to verify it works and pick a working one and you should not be an engineer ! You use proven designs. Cadence, Mentor and other IP vendors will happily supply...
And performance? You're only given x number of clock cycles to execute your square root operation. It needs x digits of accuracy. It needs to fit in this physical area, meet some power requirements, I/O requirements... Yup, copy and paste. Let's see how far you get with that.
For any given algorithm you will need x clock cycles. can't go faster than that. no point in trying. As for area , same thing. if a flipflop is 1 square millimeter in your process and you need 10 flipflops you need 10 square millimeter + x amount of routing space. if the boss tells you you only get 5 square milliemter .. bad luck it can't be done. You can try until the cats come home.
As for power requirements , I/O requirements. same as above. if you need 8 datalines and you only have 4 you will have to cook up some mulitplexing scheme and you will incur a speed penalty. And if every mos has x gate charge and y leakage you will be wasting x electrons per clock cycle. Multiply by clock speed and you know consumption. The formulas are known , The lab has characterised all cells for your given process and it is all fed in the design library. You don't even need a calculator, the design tool will tell you. If it can't be done you will have to either shrink technology, get lower leakage technology, drop supply voltage. You can't bend the laws of physics.
None of the problems you mentioned require you to know how a square root algorithm works. Knowing how the algorithm works is IRRELEVANT in al those cases. (maybe you could give them to your tech. He'll know how to do it)
Here's another slapper : ( i went back through the thread .... )
What I disapprove of is how a lot of techs can't accept that they don't have the same understanding of electronics as an EE.
What i disapprove off is engineers that think techs are a lower life form to be treated with disrespect and disdain. And especially disapprove of engineers that think that techs could never have a greater understanding of EE than their 'engineer overlords'. Real engineers do not look down on, or consider themselves 'better than'. They work alongside.
Engineers need to know and accept that techs know things that engineers don't and vice versa. They collaborate... they don't piss on each other (friendly bantering aside)
So get off your throne... you are making a fool of yourself.
as for :
You would get laughed at trying to work at a place like that with an undergraduate degree or lower.
Nobody in SV (silicon Valley) looks down on you if you don't have a formal degree. It's how many successfull designs you have, how many products are sold or used every single day that contain your design or idea and how much money they bring in for the company that matters. Heck , half of the companies out here were started by degree-less people...
What does get frowned upon is thinking you are better because you got a ribbon in school....
I like how no one has pointed out the techs
- that have to fix all the crap the golden ribbon engineers produce so it actually works. those are the real heroes.
or the techs that made the first board for the untested silicon, debug the non-working chip, found the internally misconnected reset line (one block was active high, the other active low. the 'engineers' forgot an inverter...) , did a cut with the laser on the naked die , plunked a probe needle on it to set the reset line to the right level, got the crystal oscillator to run and found the bug in the mask-rom bootloader , patched it , so the software people could go on and write software...
DO NOT TALK DOWN ON TECHS !