EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: Saimoun on July 25, 2021, 10:31:39 am
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Hi :)
I have a 3.3V MCU. I want to use 1 GPIO to create a +5V digital signal.
The signal is sent to an external connector so there should be ESD protection for the transistor.
My questions:
1) do BJT transistors need ESD protection? I guess not nearly as much as an exposed MCU pin for example?
I do not want the output to "jump" to 5V when the device is powered up - it should stay at 0V. I tried to do this using an open drain output with an external pullup on the base of the transistor (see attached schema - and the zoomed result). C1 is there to reduce the rise time, but clearly it takes a bit of time to charge up so there is a bump at power up.
2) How to solve that problem? Could I do this using a PNP for example?
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How about driving a couple 5 volt 7404 inverters in series. Not the most elegant solution, but it works.
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How would you do that?
I have to mention the price is an important factor to me ;D
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Any 74HCT series gate, most obviously a non-inverting buffer, will do the level conversion. They are not expensive and are available in small single-gate packages as well.
For added ESD protection, ESD protection diode/TVS. A lot of integrated parts available, these have their own sections on distributors, sort for price.
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They do not cost "much" but still 40 cents, while a BJT will cost about 1 cent.
Are you guys saying it is not possible to do this with a simple transistor?
And about the ESD protection I actually read online that a BJT would not need any protection as in case the voltage raises it will simply sink the current to ground, actually like a TVS diode would. Or did I miss something?
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Have you tried running with the 3.2V? A lot of 5V devices operate just fine with 3.2. I have a project on the bench with a 5V shift register operating with 3.2 inputs perfectly.
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That's a good point, but in this case I have no idea what devices will be connected to the signal - some of them will definitely accept 3.3V, but not all :)
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And about the ESD protection I actually read online that a BJT would not need any protection as in case the voltage raises it will simply sink the current to ground, actually like a TVS diode would. Or did I miss something?
That pretty much covers it. The gate oxide of a MOSFET is particularly fragile and must be protected from any excessive voltage or face catastrophic failure. A MOSFET transistor could also be used in your application since the gate is not exposed.
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That's a good point, but in this case I have no idea what devices will be connected to the signal - some of them will definitely accept 3.3V, but not all :)
Which is one major reason to use an optocoupler... as is standard in all industrial applications. Yes, costs a bit more than 1 cent, but will let you sleep well at night.
But for a cheap solution you'll need two transistors (plus and few resistors), an NPN (CE) followed by a PNP (CE). This will ensure that your output is inactive and at 0 V until the MCU IO pin goes high.
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Quote from: simonlasnier on Today at 14:00:26
And about the ESD protection I actually read online that a BJT would not need any protection as in case the voltage raises it will simply sink the current to ground, actually like a TVS diode would. Or did I miss something?
That pretty much covers it. The gate oxide of a MOSFET is particularly fragile and must be protected from any excessive voltage or face catastrophic failure. A MOSFET transistor could also be used in your application since the gate is not exposed.
David, that sounds like an excellent way to save money. Based on your experience, what model BJT, in which circuit would you suggest to the TO? For ESD severity let's assume standard human body model at 2kV. As a bonus, what would you suggest for a MOSFET-solution?
Thanks, marcus
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What about this solution using MOSFET?
Source: electronics.stackexchange.com
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What about this solution using MOSFET?
Source: electronics.stackexchange.com
Output is +5 V when power is off. Not desirable.
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This should work:
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If the device where the output is being connected to is unknown, you should provide an open collector output so the receiver can decide what to do with the GPIO signal, like the output on many sensors or an optocoupler like another member suggested.
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mosfet level converter is the answer, cost-effective too
output transistors (bjt, fet...) usually don't need electrostatic discharge protection, only in very particular use case
we've done medical projects, none with this type of output protection
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74HCT1G125
https://assets.nexperia.com/documents/data-sheet/74HC_HCT1G125_Q100.pdf
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mosfet level converter is the answer, cost-effective too
output transistors (bjt, fet...) usually don't need electrostatic discharge protection, only in very particular use case
we've done medical projects (emphasis by harerod), none with this type of output protection
Human Body Model: capacity 100pF, 1500 Ohm impedance
IEC61000-4-2/IEC60601-1-2:+-8kV HBM contact, +-15kV air ?
Are you permitted to share your interface schematics, including components?
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Thanks everybody for the replies! It seems you have misunderstood when I said "I do not know what devices will be plugged in". I do not know they will all be devices with a certain load, some of them light, some of them lower. And then some of them will have a very low threshold like 1V, others will have a much higher one like maybe 4V. Either way a 5V signal should work with 99% of them.
This was kind of what I was looking for:
This should work:
I made the attached circuit which seem to work fine :)
I will solder and do some experiments with real components :)
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How fast does it need to be? C2 makes it very slow.
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Not fast at all. The diagram shows the max speed, about 6ms period.
C2 is to reduce EMC :)
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How about two NPN BJTs? That way there's only one type of transistor in your circuit.
How many chanels do you need? If it's more than one, you're almost certainly better off using an IC, given the space required for the other components.
(https://www.eevblog.com/forum/beginners/5v-digital-signal-from-3-3v-mcu-with-esd-protection/?action=dlattach;attach=1239650;image)
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@Zero: that looks great, thanks! I'll try that out.
And yes a very good point about using an IC, and I found some of these 74HC for 4 cents. But I only need 1 channel, so I think it is easier this way :)
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How about two NPN BJTs? That way there's only one type of transistor in your circuit.
Will also work.
My reason for choosing the NPN/PNP combo was that the output will stay at 0 V when the MCU/driver is powered off and when powering up.
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Oh ok I thought this was going to work the same way ;D
What is the difference then, between using two NPN's instead of one? More current? (I do not need much current as you can guess with the 1k output :) )
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It's just a question of whether the output resistor is pulling up (NPN version) or pulling down (PNP version). This makes a difference when powering up or down. The PNP output will be at 0 V during this time. The NPN version: I don't know.
Using two NPNs is redundant and unnecessary complexity to my mind (you can control the IO polarity in software).
You decide which behaviour is desired.
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Quote from: simonlasnier on Today at 14:00:26
And about the ESD protection I actually read online that a BJT would not need any protection as in case the voltage raises it will simply sink the current to ground, actually like a TVS diode would. Or did I miss something?
That pretty much covers it. The gate oxide of a MOSFET is particularly fragile and must be protected from any excessive voltage or face catastrophic failure. A MOSFET transistor could also be used in your application since the gate is not exposed.
David, that sounds like an excellent way to save money. Based on your experience, what model BJT, in which circuit would you suggest to the TO? For ESD severity let's assume standard human body model at 2kV. As a bonus, what would you suggest for a MOSFET-solution?
Do not misunderstand; it is not that bipolar transistors are immune to ESD damage, but that the MOSFETs are particularly susceptible at their gate lead. So it is a good idea to protect any outside connection anyway to some extent depending on the application. Good design practices for handing over-voltage, over-current, and radio frequency interference are usually sufficient.
In practice any transistor with a relatively large junction area protects itself, so parts with say a 200 milliamp collector/drain current rating or higher do not require any special protection against ESD, but it may still be desirable to protect bipolar transistors from reverse voltage; power MOSFETs have a built in body diode which does this for them. Larger transistors with larger junctions are even better protected.
As far as what transistor to use, I would tend to go with the 200 milliamp 2N3904/2N3906 or 800 milliamp 2N4401/2N4403. In the past I might use the 2N7000 n-channel MOSFET but there is probably a better modern part now. A lot of old designs used the 2N2222/2N2907. The exact part is not important.
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How about two NPN BJTs? That way there's only one type of transistor in your circuit.
Will also work.
My reason for choosing the NPN/PNP combo was that the output will stay at 0 V when the MCU/driver is powered off and when powering up.
It's just a question of whether the output resistor is pulling up (NPN version) or pulling down (PNP version). This makes a difference when powering up or down. The PNP output will be at 0 V during this time. The NPN version: I don't know.
Using two NPNs is redundant and unnecessary complexity to my mind (you can control the IO polarity in software).
You decide which behaviour is desired.
It won't make any difference. Both circuits will do that. If the MCU is unpowered, the first NPN transistor will be off, so the second one will be on, causing the output to be low. In PNP & NPN circuit, both transistors will be off, when the MCU is unpowered and the output will still be only 0V.
The NPN output can pull down hard, and the PNP circuit can pull up hard. The all NPN circuit has the advantage of having a simpler BoM and has the potential to be faster, but the latter is unimportant here.
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It won't make any difference. Both circuits will do that. If the MCU is unpowered, the first NPN transistor will be off, so the second one will be on, causing the output to be low. In PNP & NPN circuit, both transistors will be off, when the MCU is unpowered and the output will still be only 0V.
The NPN output can pull down hard, and the PNP circuit can pull up hard. The all NPN circuit has the advantage of having a simpler BoM and has the potential to be faster, but the latter is unimportant here.
This is only true when you know from where the 3.3 V and the 5 V supply come from and how they ramp up/down. And we don't.
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It won't make any difference. Both circuits will do that. If the MCU is unpowered, the first NPN transistor will be off, so the second one will be on, causing the output to be low. In PNP & NPN circuit, both transistors will be off, when the MCU is unpowered and the output will still be only 0V.
The NPN output can pull down hard, and the PNP circuit can pull up hard. The all NPN circuit has the advantage of having a simpler BoM and has the potential to be faster, but the latter is unimportant here.
This is only true when you know from where the 3.3 V and the 5 V supply come from and how they ramp up/down. And we don't.
The same is true of both circuits. If the power supplies do crazy, unpredictable things, the outputs will do the same.
If what you're refering to is with the all NPN circuit, the output will go to 0.6V, before falling to zero again, if the 5V supply is gradually ramped up, then that is a disadvantage, but I wouldn't expect anything to happen with the rest of the circuit, at such a low voltage.
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@Benta and Zero: Interesting conversation!! Thank you for the info it is great :D
Just FYI the +5V comes from USB, and the +3.3V from an LDO powered from that +5V.
I think the problem is more about the fact that the MCU GPIO will be floating at power up, and only a few micro/milliseconds later it can be pulled low.
I think I will try both circuits and see :)
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So I tested the circuit with real components and everything seems to work fine.
BUT my idea was to use a TRS connector I already have on the board: the T (tip) connector was already wired to an input with a light load (about 100k), the R (ring) was unused, so I connected the 5V digital ouput to the R.
Without the filtering cap I get massive spikes on the T connector while the output is switching. Adding that 100nF cap reduces the spikes to about 400mV. The TRS connector's datasheet says there is 100Mohm isolation between the connectors.
Any idea how to reduce that cross-talk? Or maybe it is a terrible idea generally to use the same connector? ::)
Thanks
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Do not misunderstand; it is not that bipolar transistors are immune to ESD damage, but that the MOSFETs are particularly susceptible at their gate lead. So it is a good idea to protect any outside connection anyway to some extent depending on the application. Good design practices for handing over-voltage, over-current, and radio frequency interference are usually sufficient.
That much I will accept, especially if it is understood that the transistor is backed up by other circuitry and and adequate layout. However, in my experience that "backup" would have to include ESD protection devices.
I also like your comment about other EMI scenarios. Emission testing usually being done first, is a great indicator for upcoming issues in the imission and ESD tests.
In practice any transistor with a relatively large junction area protects itself, so parts with say a 200 milliamp collector/drain current rating or higher do not require any special protection against ESD, but it may still be desirable to protect bipolar transistors from reverse voltage; power MOSFETs have a built in body diode which does this for them. Larger transistors with larger junctions are even better protected.
A standard ESD test reverses polarity, will exceed ratings of most BJTs or MOSFETs, and inject charge into the rest of the circuit.
Alright, since we still don't know the numbers behind the TO's actual requirements (test level), we might as well wrap it up here. A recommendation would be to include ESD-protection devices at least in footprint and do ESD tests in different configurations.