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A niche chip (LT4320) for mains powered AC -> low volt DC "linear" based psu ?
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johansen:
http://i227.photobucket.com/albums/dd168/Toey1/Turnoffsharpener.jpg

current gain is subject to hfe
digsys:
Still not sure what you mean?
I can't see LT making a custom chip and "forgetting" to have enough drive dynamics to the FETs, after all, most will
only ever operate at 50/60Hz. Plus we have no idea of internal topography and if we are even able to reference
extra drive devices? Did you find more app circuits? Well, I'll find out in a couple weeks or so anyway.
johansen:

--- Quote from: digsys on September 24, 2013, 05:12:15 pm ---Still not sure what you mean?
I can't see LT making a custom chip and "forgetting" to have enough drive dynamics to the FETs, after all, most will
only ever operate at 50/60Hz. Plus we have no idea of internal topography and if we are even able to reference
extra drive devices? Did you find more app circuits? Well, I'll find out in a couple weeks or so anyway.

--- End quote ---
i don't consider 6mA of gate pull down current sufficient for anything.

i suppose in theory it works.
i mean i've seen 60 volt 60 amp fets driven directly from an LM358 without a gate drive resistor.
i've also seen the same fets driven from something 1000 times "stiffer" but then they used a 2.2K ohm gate resistor.
both of those examples are from 300-500 watt push-pull APC UPS
 
but that is still on the order of 10 times as much current as that chip can deliver.
johansen:
it seems to me this chip is aimed at very low power consumption devices.
and at 4$ per chip in a 10 lead MSop device it seems to be targeted for very small devices as well.
1mA of gate drive sounds like its enough but in practice i think we're looking at something that might be able to handle a 10 amp diode bridge but not much more without additional gimmicky to built a more robust gate drive.
i think you could make a bootstrap cap, diode, zenar, npn/pnp driver to assist this device that could drive an amp or five through a big Fet from just another mA or three of power dissipation, but my brain is mush right now.

assuming reasonable expenditure on diodes, you can get 100mv per 10 volts PIV rating reasonably cheap.
so for a 35 volt dc output from 24vac, we need 40 volt mosfets (i would run them that high, but many won't, so they will go for 50 volt fets)
at 10 amps dc current we go for 10mOhm fets at 1$ each. plus 4$ for the part and two square inches of board space.
that's 8$ to get from 10 watt of loss from standard silicon at 1 volt drop to 2 watts of loss.

or i can get some .35 volt drop schottky diodes and let them radiate the 7 watts of heat away at 100C, for 6$.
2$ increase to save 5 watts is tempting, but that's 40 cents per watt that could be spent elsewhere.

not a bad trade off really, but they could have integrated a bootstrap capacitor and made a larger, higher voltage device.
BravoV:

--- Quote from: digsys on September 24, 2013, 05:12:15 pm ---Well, I'll find out in a couple weeks or so anyway.

--- End quote ---

Which mosfet do you have in mind ?


Questions on the mosfet selection criteria quoting the datasheet :


--- Quote ---Other Considerations in MOSFET Selection

Choose the lowest available total gate charge, QG, and correspondingly the lowest CISS, COSS, and CRSS. Choosing a lower gate capacitance while meeting RDS(ON) speeds up the response time for full enhancement, regulation, turn-off, and input shorting events.

VGS(th) must be a minimum of 2V or higher. A gate threshold voltage lower than 2V is not recommended since too much time is needed to discharge the gate below the threshold and halt current conduction during a hot plug or input short event.
--- End quote ---

Say we working at common 50/60Hz, although it stated to use lowest gate charge, but how low is low enough ? <= 1000 pF ? <=2000 pF ? I can't find it in the datasheet.

Am I correct at that VGS threshold requirement, basically it rules out those logic level mosfet ?
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