"2° 2N3904 has a
minimum H
FE of 60 if Ic =50mA"
You must remember that those figures are limits, beyond which the transistor doesn't meet spec. as a 2N3904 and shouldn't have made it out of the factory marked as one. However unless you want to be *REALLY* *STUPID* and f**k about with 'select on test' till it works
*, you do have to design to the worst case specs, for each limit determining whether the worst case is the minimum or maximum value. Sometimes we extrapolate from the specs for a prototype or small scale production with reasonable confidence that failure to meet our extrapolated spec will be caught by testing, but if you are doing anything high reliability or for volume production, that can bite you in the ass.
So @Ic=50mA it *probably* has more gain, maybe up around 120, or even as high as 180 as the 3:1 ratio at 10mA indicates the gain isn't tightly controlled.
Your base resistor calculation is OK if you have actually measured the gain and don't care about saturation. However that's 'select on test' territory, and as you are already here asking for help understanding BJTs, I *KNOW* you aren't that stupid. As NOT STUPID, you will of course round down to 4K7 not up to 5K6. It will probably have enough excess base current, and an outlying H
FE 180 (estimated) device would have well over 3x excess base current so would be well into saturation.
However the low gain outlier of a H
FE 60 (spec) transistor wont have enough margin, and here's why:
Lets look at fig. 16 and consider 10mA IC load current for a bit (as we don't have a curve on fig 16 for 50mA, and have limiting values for the H
FE @10mA), you will see its left saturation if the base current is below 0.085mA and the knee of the curve is at about 0.095mA. Unfortunately we aren't given a number for the typical H
FE the curve was plotted for but as all the other H
FE values we were given were aat Vce=1V and the fig 16 graph goes up that high we can take Ib @ Vce=1V from the graph and calculate it: 10/0.08 gives typ. H
FE of 125 @Ic=10mA. That's quite a surprise how heavily biassed it is towards the low end of the permitted H
FE range.
Looking at the 30mA curve, the knee is at about 0.45ma and at 1V its about 0.36ma, so the excess required to get below the knee is 25%, and similarly for the 100mA curve 4.3mA and 3.0mA shows it needs 43% excess base current. Its fairly obvious that providing 2x the base current will always get you below the knee and properly into saturation
at 25 deg C hence the formula I gave earlier Ib>2*Ic/H
FE_min[/quote]
Ideally we'd design to a forced beta of 10 (Beta is the *old* name for H
FE and a forced beta is the ratio of Ic to Ib you decide to provide to ensure its saturated), as that will guarantee saturation over the full temperature range with any 2N3904, but assuming you are short of MCU output current, the highest forced beta we could tolerate would be H
FE_min/2.
Re-running the calc for a forced beta of 10:
Ic=50mA, Vbe=0.85V (from fig.17), and Voh=4.55V (extrapolated from ATmega328P datasheet, assuming Vcc is 5% low)
Ib=Ic/forced_beta=50mA/10=
5mAVrb=Voh-Vbe=4.55V-0.85V=
3.7VRb=Vrb/Ib=3.7V/5mA=
740 OhmsNext lowest E12 preferred value is 680 Ohms
Rerunning it for a forced beta of 30 (H
FE_min/2 @50mA Ic):
Ic=50mA, Vbe=0.8V ('guesstimated' from fig.17), and Voh=4.7V (assuming Vcc is 5% low)
Ib=Ic/forced_beta=50mA/30=
1.67mAVrb=Voh-Vbe=4.7V-0.8V=
3.9VRb=Vrb/Ib=3.9V/1.67mA=
2340 OhmsNext lowest preferred value is 2.2K
My original suggestion of 1K is between these two values and biased towards the lower one.
Going back to your understanding of fig.16:
Take a PSU with an accurate current limit (or rig a current limiter or current source of some sort that can cover the range 1mA to 100mA).
Keep the max voltage available from the current source down to a few volts as we are only interested in the region below 1.0V.
Take a box of 2N3904 transistors and a transistor tester, set its test Ic to 10mA and select one with H
FE of 125 - a truly average device.
Hook it up on a breadboard with the emitter grounded and the current source feeding the collector. Set up to provide an adjustable base current in the range 10uA to 10mA - a variable voltage supply and a series resistor going up in decade steps would be the easiest option.
Take 3 multimeters - one for base current, one for collector voltage, and the last for collector current (so you can be certain your current source is delivering the correct current), and wire them into the circuit and you can start plotting each curve. If you've got an
EEVblog uCurrent, the base circuit would be a good place to use it.
First set Ib to the leftmost point on the curve, then increase the collector current supply till it reaches the current marked by the line you are plotting, and then readjust Ib. Read Vce and Ib, plot them then decrease Ib to the next division on the graph paper, check Ic hasn't changed and repeat till Vce reaches 1.0V. That's one curve done. Reset Ic to the next curve and repeat till you've got them all. For the 100mA curve you should switch off and let the transistor cool in between readings. That's your whole afternoon gone reproducing one figure in the datasheet.
A similar rig can be used for the 25 deg C line of fig.15 and for fig.17 though fig.17 needs an extra High impedance voltmeter to monitor Vbe.
More practically you can get these sorts of plots from a
curve tracer. Analog curve tracers consist of a ramp generator that controls a voltage or current source (selectable) over a preset range, + a circuit to measure the resulting current or voltage (again selectable) at the same or another terminal of the device. Additional fixed voltage or current sources are typically required to bias the device (e.g. at fixed Vce or fixed Ic or fixed Ib etc.) for the desired curve. The ramp generator and the measured result converted to a voltage are applied to a CRO in X-Y mode to plot the result. If the ramp is slow enough its also possible to plot it on a chart recorder, but then one assumes the ramp is linear with respect to time. Another 'cheat' is if your CRO has a timebase (X axis) ramp output on the back panel - then you can skip the ramp generator, let the timebase free-run and just scale the output with an OPAMP to drive your D.U.T. Another refinement is to add a crude 3 bit DAC to sweep one of the 'fixed' sources. Increment the counter driving it after every ramp and you'll get eight curves on the screen as that source is stepped.
Nowadays you are better off with a digital curve tracer. It has a job lot of DACs, ADCs and scaling circuits, and pulses the device on only long enough to take each measurement so it doesn't heat up and shift the results. Output gets logged to a file and can be plotted on your PC. Google:
Arduino curve tracer for some ideas on how you could build one.
* Occasionally 'select on test' is NOT STUPID e.g. when it lets you get away without a *MUCH* more expensive part, and you are certain that voltage and temperature variations wont throw the carefully tweaked circuit out of operation, but you'd better figure in to the costings your cost per hour, so if you are only saving a few bucks you are back to stupidity.