About DDR4 CLK Signal Termination

[ESR30]

Hi.
I would like to know how to terminate the DDR4 CLK signal.
The general design of DIMMs is to use the VDD plane as the signal return, so the termination is also connected to the VDD.
However, if the GND plane is used as the signal return, should the termination be connected to GND?
Or should it be connected to the VDD as in the case of DIMMs?
Thanks.

[m k]

Less noisier is obviously better so low side by intuition.
But since intuition is what it is I'd go with the manufacturer.

Time is also a bit difficult to inject in regular intuition, specially when it is very short.
Ideal concepts like GND may also be very different when observed time window becomes short enough.