ADC INL error

[JoeyG]

I'm trying to work out the INL error percentage from a ADC data sheet as a percentage.

If the datasheet says
Vdd_ref =- 3v0 (FSL  full scale reference)
ADC INL is -+2LSB
Assume zero offset error
number bit is either 8

What is the percentage error acceptable at  V_adc = 1V

Here is my calculations
for 8 bit  ~ 256 levels
ADC LSB is  = Vdd_ref/256  = 0.012V = 12mV   

For the 1v ADC reading  it can be:
Reading low   1v-2LSB  = 1v -2x12mV   = 0.976   IE  -2.4%
Reading high  1v-2LSB  = 1v _ 2x12mW  = 1.024   IE  +2.4%

IE the Error can be _+2.4%

[radiolistener]

2 LSB * 3 V / 256 = ±0.0234375 = ±2.34375 %

[Andreas]

No,

Inl is defined as best straigth line. (you are assuming the end point method).

So deviation from actual value may double.
See figure 4 here:

https://www.allaboutcircuits.com/technical-articles/adc-integral-nonlinearity-inl-best-fit-line-inl-definition-absolute-accuracy-relative-accuracy-and-total-unadjusted-error/
with best regards

Andreas