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Electronics => Beginners => Topic started by: thingsis on October 16, 2015, 08:08:06 am

Title: Advanced bank switching for SBC
Post by: thingsis on October 16, 2015, 08:08:06 am

Hi,

I am building my first Single Board Computer after having done numerous other electronic projects. I have this idea for the memory map that I would like to bounce off of you guys and get some input as to how this could be achieved. Basically it goes like this:

I have two memory chips: 16kB ROM and 32kB RAM. Let's assume my address space is 32kB for this. Those 32kB are mapped to the ROM and half the RAM. So far so good. But here are the two "ideas"

1) When the computer boots, it copies the ROM to the 16kB of RAM that are currently not mapped and then swaps the ROM and that part of the RAM, resulting in only the 32kB RAM being mapped. My problem is not the swapping, but the writing to the RAM while it is not mapped.

2) Here we go: The ROM chip is actually 128kB Flash. The buttom 16kB of this is the ROM code. I want to use the remaining space is an I/O device (mass storage). Next to having mass storage this serves another purpose. The chip can be programmed in system that way - but only if I can access the whole thing!

The ROM chip is a Microchip SST39SF010A.

Thanks for any help!

Title: Re: Advanced bank switching for SBC
Post by: Ian.M on October 16, 2015, 09:52:11 am

32K is a *very* unusual size for an address space.  Are you using A15 to distinguish between memory and I/O in a 64K address space?  If so, you might do better to reduce the I/O space to 16K by using A15 & A14 to decode it letting you map the 16K ROM page and the RAM simultaneously.


One trick that helps is that on startup, all read accesses in the bottom 16K should be mapped to the ROM and all write accesses mapped to the RAM.  This allows you to use a simple loop that reads each byte and writes it back to the same address to copy ROM to RAM.  Another trick is to simply double map the ROM so it appears at the reset vector for N reads after reset, overriding the RAM, just long enough to execute a jump to the ROM's usual address.

If your cycle time permits it and you can source a pair of NOS 74F189 or better 74F189A, it becomes fairly trivial to expand an address bus by 4 bits, with 16 fully selectable pages from a pool of 256.  See https://www.eevblog.com/forum/beginners/z80-single-board-memory-bank-switching/msg268606/#msg268606 (https://www.eevblog.com/forum/beginners/z80-single-board-memory-bank-switching/msg268606/#msg268606).  You can get there by other means, but either you need a metric s--tload of logic, or you have to deal with data in and out being on the same pins of the mapping RAM.

Title: Re: Advanced bank switching for SBC
Post by: thingsis on October 16, 2015, 10:21:14 am

Hey Ian,

thanks for your reply. The trick with distinguishing between read and write at startup sounds really good! The address space is actually 64k. We are only looking at 32k of that at the moment for the sake of this problem. The other 32k will be mostly RAM with some I/O.

Thanks again!