Author Topic: Advice on high-speed signal for clock line  (Read 625 times)

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Offline SarcareanTopic starter

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Advice on high-speed signal for clock line
« on: March 02, 2019, 09:16:05 am »
From my MCU I have a 96MHz clock going to a global clock input pin on a FPGA. The distance between BGA pads is about 25mm.

Does anyone have any advice on what I should do to ensure a proper / clean clock signal?

I've been told that I may need to use a vibration absorbing resistor in series with the PCK_0 line.

Thanks in advance for everyone's feedback :)
 

Offline Rerouter

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Re: Advice on high-speed signal for clock line
« Reply #1 on: March 02, 2019, 09:20:34 am »
the resistor would actually be for EMI,

Route it like a 50 ohm controlled impedance trace if single ended, or a differential 90 ohm trace if differential.

The resistor right at the source of the clock signal would be to reduce the amplitude of the noise the trace is radiating, and act as source termination.
 

Online iMo

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Re: Advice on high-speed signal for clock line
« Reply #2 on: March 02, 2019, 12:57:02 pm »
The series resistor is usually something like 22ohm, 33ohm..50ohm.
Avoid right-angle bends (best rounded) and vias, the clock's signal return path shall be straight and continuous as well.
Readers discretion is advised..
 


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