If understanding you right, it is a little like antenna design. Some woodo is involved.
No, there is no antennas involved at all in this design.
If you mean the word “antenna” used in the datasheet, where they discuss PCB layout recommendations, it’s about creating an
unintended antenna. The chip is intended to work with very low currents, where electromagnetic interference can easily induce unwanted signals. Hence nothing connected to this chip should act as an antenna, and current loops should have possibly small area. You can see an example of this approach in how sense lines are laid out. The red part is the loop area being minimized, with the loop arae itself marked in a fragment of your schematic:


Other loops would be formed by having long power line traces, but area is already minimized with the ground plane being used.
Only ground loop - if understanding it right, is the connection to the NTC from the pcb?
A ground loop is any current loop that involves ground.
From Ohm’s law (V = I·R), any current in a conductor is going to produce voltage. So real ground conductors are never truly at 0 V, if they carry current. These are usually minuscule voltages. But if we work with equally tiny signals or signals are amplified, that matters: that tiny offset is added to our tiny signal or is going to be amplified. Now observe that the current draw from nearby circuits is rarely steady, but instead is fluctuating. Which basically means it’s injecting a ton of noise into what we’re trying to actually process. Simply because current goes through the same ground conductor.
Does it matter that much? Is it as scary as the previous paragraph makes it sound? In general: no, not really. With most circuits it’s not going to matter, ground planes already work great for eliminating the problem, and the shift to using higher speed (means: higher frequencies) circuits makes the problem even less pronounced than it would be in the past. But it is a problem one should certainly be aware of.
This goes beyond my detailed knowledge, so I’ll leave this part to more experienced forum members, if you have more specific questions.
The datasheet mentions separating grounds. I believe the authors just handwaved the entire topic, assuming the reader knows the problem already. It’s about separating this chip’s ground from a ground that powers digital
section. That is: if you have some heavy digital circuitry in your design, its ground should not be connected in a way that would make currents affect this amplifier’s ground. It does not seem to be the case in your schematic.