Amplifier PCB design, remove ground loop keeping short bypass return current?

[hitech95]

Hi, I'm designing a simple stereo AMPlifier board based around the TAS5731M chip.
I've started to design the PCB, I've mostly used as a reference the EVM board from TI.
Unfotunatly due to space constaints I had to compact a section of the board.
Doing so I have the following situation:


As you can see the pink color section is an analog ground, that section should be connected to the main GND via a single 0 ohm resistor.
As you can see the copper fill is creating a loop around the IC pin.
The rounded silkscreen parts are caps, and the top most component of the stack is the bypass for the analog supply of that IC.
The vias are not connected to anythig; they was there due to my original plan of having a small AGND plane on the bottom layer.

How can I prevent such type of loops?

The board is at least a 2 Layer 4 layer due to impedance matching for the 50ohm single endfed I2S signals, Bottom and inner layer are a ground fill and big power poligons.
On bottom layer there are some power traces.

On the same board I also have a 24.576Mhz (MCLK) clock signal track coming from another board, it is the master clock for the MUX IC (PCM9211).

Such track is quite long, it is about 10cm in my board but it is coming from another chip on the other board, that one is quite far.
So I presume that the total length of such track is around 30cm.
AFIK that signal is feeded into different chips. Is there a way to tap it without adding delay and destroying the signal?

Have a nice day,
Nicolas

[hitech95]

Small update, about the clock I will be going with a complete different solution, I will find a way to use a clock driver to provide clocks to all the ICs, and use buffers to split the i2s signals.
AFIK I2S is a 50ohm single ended signal so it looks like that I have to impedance match thoose lines. Especially the 25MHZ for the MCLK.

I'm wondering if I also have to length match them.

[hitech95]

No one?
My idea was to add another ground plane adn add some more vias to prevent as possible ground loops making a more equal possible analog ground plain.

Is this a good way?

[Hugo Balls]

I mean edit that polygon so it wouldn't go over those pins? That tiny loop shouldn't affect anything anyways
Also i dont't think there is a need for such ground splitting especially considerign it's all digital
One solid ground plane should be plenty

[hitech95]

I mean edit that polygon so it wouldn't go over those pins? That tiny loop shouldn't affect anything anyways
Also i dont't think there is a need for such ground splitting especially considerign it's all digital
One solid ground plane should be plenty

The fact is that the poligon part above the pin provide a short path for the analog supply bypass cap.
While the bottom part is there to provide a path for the filters.