This is not how you test RDS(on). The proper way is to turn the FET hard on (source to -, gate to +) and limit conducted current by means of a suitable power resistor between + and drain.
Your circuit is similar to a source follower, always maintaining Vds > Vgs and Vgs is quite far from zero. What you actually observe is probably the dependence of Vgs on temperature - the hotter the FET, the less Vgs is necessary for any given Id.